Lines Matching refs:C

14 #define C(_x)				PERF_COUNT_HW_CACHE_##_x  macro
244 [C(L1D)] = {
245 [C(OP_READ)] = {
246 [C(RESULT_ACCESS)] =
248 [C(RESULT_MISS)] =
251 [C(OP_WRITE)] = {
252 [C(RESULT_ACCESS)] =
254 [C(RESULT_MISS)] =
257 [C(OP_PREFETCH)] = {
258 [C(RESULT_ACCESS)] =
260 [C(RESULT_MISS)] =
264 [C(L1I)] = {
265 [C(OP_READ)] = {
266 [C(RESULT_ACCESS)] =
268 [C(RESULT_MISS)] =
271 [C(OP_WRITE)] = {
272 [C(RESULT_ACCESS)] =
274 [C(RESULT_MISS)] =
277 [C(OP_PREFETCH)] = {
278 [C(RESULT_ACCESS)] =
280 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
284 [C(LL)] = {
285 [C(OP_READ)] = {
286 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
287 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
289 [C(OP_WRITE)] = {
290 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
291 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
293 [C(OP_PREFETCH)] = {
294 [C(RESULT_ACCESS)] =
296 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
304 [C(DTLB)] = {
305 [C(OP_READ)] = {
306 [C(RESULT_ACCESS)] =
308 [C(RESULT_MISS)] =
311 [C(OP_WRITE)] = {
312 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
313 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
315 [C(OP_PREFETCH)] = {
316 [C(RESULT_ACCESS)] =
318 [C(RESULT_MISS)] =
322 [C(ITLB)] = {
323 [C(OP_READ)] = {
324 [C(RESULT_ACCESS)] =
326 [C(RESULT_MISS)] =
329 [C(OP_WRITE)] = {
330 [C(RESULT_ACCESS)] =
332 [C(RESULT_MISS)] =
335 [C(OP_PREFETCH)] = {
336 [C(RESULT_ACCESS)] =
338 [C(RESULT_MISS)] =
342 [C(BPU)] = { /* What is BPU? */
343 [C(OP_READ)] = {
344 [C(RESULT_ACCESS)] =
346 [C(RESULT_MISS)] =
349 [C(OP_WRITE)] = {
350 [C(RESULT_ACCESS)] =
352 [C(RESULT_MISS)] =
355 [C(OP_PREFETCH)] = {
356 [C(RESULT_ACCESS)] =
358 [C(RESULT_MISS)] =
362 [C(NODE)] = { /* What is NODE? */
363 [C(OP_READ)] = {
364 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
365 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
367 [C(OP_WRITE)] = {
368 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
369 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
371 [C(OP_PREFETCH)] = {
372 [C(RESULT_ACCESS)] =
374 [C(RESULT_MISS)] =