1 // SPDX-License-Identifier: GPL-2.0-or-later
10  * Read/write operation in the region 0x80000000-0xBFFFFFFF causes
23  * We know (and support) only one board that uses the PCI interface -
53 #define AR2315_PCIMISC_GIG_MASK	0x0000000C	/* bits 31-30 for pci req */
101 #define AR2315_PCI_INT_TXEOL	0x00000008	/* Desc In End-of-List */
106 #define AR2315_PCI_INT_TXOOD	0x00000200	/* Desc In Out-of-Desc */
132 #define AR2315_PCI_IRQ_ABORT		26
142  * We need some arbitrary non-zero value to be programmed to the BAR1 register
180 	return dma_addr - ar2315_dev_offset(dev);  in dma_to_phys()
185 	struct pci_controller *hose = bus->sysdata;  in ar2315_pci_bus_to_apc()
192 	return __raw_readl(apc->mmr_mem + reg);  in ar2315_pci_reg_read()
198 	__raw_writel(val, apc->mmr_mem + reg);  in ar2315_pci_reg_write()
217 	u32 mask = 0xffffffff >> 8 * (4 - size);  in ar2315_pci_cfg_access()
233 	value = __raw_readl(apc->cfg_mem + addr);  in ar2315_pci_cfg_access()
242 		__raw_writel(value, apc->cfg_mem + addr);  in ar2315_pci_cfg_access()
315 		return -ENODEV;  in ar2315_pci_host_setup()
342 		pci_irq = irq_find_mapping(apc->domain, __ffs(pending));  in ar2315_pci_irq_handler()
354 	ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, BIT(d->hwirq), 0);  in ar2315_pci_irq_mask()
360 	u32 m = BIT(d->hwirq);  in ar2315_pci_irq_mask_ack()  local
362 	ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, m, 0);  in ar2315_pci_irq_mask_ack()
363 	ar2315_pci_reg_write(apc, AR2315_PCI_ISR, m);  in ar2315_pci_irq_mask_ack()
370 	ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, 0, BIT(d->hwirq));  in ar2315_pci_irq_unmask()
374 	.name = "AR2315-PCI",
384 	irq_set_chip_data(irq, d->host_data);  in ar2315_pci_irq_map()
398 	apc->irq_ext = irq_create_mapping(apc->domain, AR2315_PCI_IRQ_EXT);  in ar2315_pci_irq_init()
400 	irq_set_chained_handler_and_data(apc->irq, ar2315_pci_irq_handler,  in ar2315_pci_irq_init()
413 	struct device *dev = &pdev->dev;  in ar2315_pci_probe()
419 		return -ENOMEM;  in ar2315_pci_probe()
423 		return -EINVAL;  in ar2315_pci_probe()
424 	apc->irq = irq;  in ar2315_pci_probe()
426 	apc->mmr_mem = devm_platform_ioremap_resource_byname(pdev,  in ar2315_pci_probe()
427 							     "ar2315-pci-ctrl");  in ar2315_pci_probe()
428 	if (IS_ERR(apc->mmr_mem))  in ar2315_pci_probe()
429 		return PTR_ERR(apc->mmr_mem);  in ar2315_pci_probe()
432 					   "ar2315-pci-ext");  in ar2315_pci_probe()
434 		return -EINVAL;  in ar2315_pci_probe()
436 	apc->mem_res.name = "AR2315 PCI mem space";  in ar2315_pci_probe()
437 	apc->mem_res.parent = res;  in ar2315_pci_probe()
438 	apc->mem_res.start = res->start;  in ar2315_pci_probe()
439 	apc->mem_res.end = res->end;  in ar2315_pci_probe()
440 	apc->mem_res.flags = IORESOURCE_MEM;  in ar2315_pci_probe()
443 	apc->cfg_mem = devm_ioremap(dev, res->start,  in ar2315_pci_probe()
445 	if (!apc->cfg_mem) {  in ar2315_pci_probe()
447 		return -ENOMEM;  in ar2315_pci_probe()
450 	/* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */  in ar2315_pci_probe()
473 	apc->domain = irq_domain_add_linear(NULL, AR2315_PCI_IRQ_COUNT,  in ar2315_pci_probe()
475 	if (!apc->domain) {  in ar2315_pci_probe()
477 		return -ENOMEM;  in ar2315_pci_probe()
483 	apc->io_res.name = "AR2315 IO space";  in ar2315_pci_probe()
484 	apc->io_res.start = 0;  in ar2315_pci_probe()
485 	apc->io_res.end = 0;  in ar2315_pci_probe()
486 	apc->io_res.flags = IORESOURCE_IO,  in ar2315_pci_probe()
488 	apc->pci_ctrl.pci_ops = &ar2315_pci_ops;  in ar2315_pci_probe()
489 	apc->pci_ctrl.mem_resource = &apc->mem_res,  in ar2315_pci_probe()
490 	apc->pci_ctrl.io_resource = &apc->io_res,  in ar2315_pci_probe()
492 	register_pci_controller(&apc->pci_ctrl);  in ar2315_pci_probe()
502 		.name = "ar2315-pci",
514 	struct ar2315_pci_ctrl *apc = ar2315_pci_bus_to_apc(dev->bus);  in pcibios_map_irq()
516 	return slot ? 0 : apc->irq_ext;  in pcibios_map_irq()