39 #include <linux/msi.h>
62 /* 128 MSI irqs per node, mapped starting at NLM_MSI_VEC_BASE */
68 /* get the link MSI vector from irq number */
84  * For XLP 8xx/4xx/3xx/2xx, only 32 MSI-X vectors are possible because
85  * there are only 32 PIC interrupts for MSI. We split them statically
86  * and use 8 MSI-X vectors per link - this keeps the allocation and
89  * not routed thru PIC, so we can use all 128 MSI-X vectors.
96 /* get the link MSI vector from irq number */
109  * Per link MSI and MSI-X information, set as IRQ handler data for
110  * MSI and MSI-X interrupts.
122  * MSI Chip definitions
125  * chip (which appears as a PCI bridge to us). This gives us 32 MSI irqa
128  * When a device connected to the link raises a MSI interrupt, we get a
175 	/* Ack MSI on bridge */  in xlp_msi_mask_ack()
184 	.name		= "XLP-MSI",
193  * The MSI-X interrupt handling is different from MSI, there are 32 MSI-X
194  * interrupts generated by the PIC and each of these correspond to a MSI-X
197  * We divide the MSI-X vectors to 8 per link and do a per-link allocation
200  * 32 MSI-X vectors are available per link, and the interrupts are not routed
203  * Enable and disable done using standard MSI functions.
216 	/* Ack MSI on bridge */  in xlp_msix_mask_ack()
244  * Setup a PCIe link for MSI.  By default, the links are in
245  * legacy interrupt mode.  We will switch them to MSI mode
246  * at the first MSI request.
255 			val |= 0x200;		/* MSI Interrupt enable */  in xlp_config_link_msi()
278 	/* MSI addr */  in xlp_config_link_msi()
282 	/* MSI cap for bridge */  in xlp_config_link_msi()
285 		val |= 0xb << 16;		/* mmc32, msi enable */  in xlp_config_link_msi()
291  * Allocate a MSI vector on a link
302 	/* Get MSI data for the link */  in xlp_setup_msi()
311 		/* switch the link IRQ to MSI range */  in xlp_setup_msi()
321 	/* allocate a MSI vec, and tell the bridge about it */  in xlp_setup_msi()
334 	xirq = xirq + msivec;		/* msi mapped to global irq space */  in xlp_setup_msi()
344  * Switch a link to MSI-X mode
359 			val |= 0x200;		/* MSI Interrupt enable */  in xlp_config_link_msix()
365 			val |= 0x200;		/* MSI Interrupt enable */  in xlp_config_link_msix()
383 		/* MSI-X addresses */  in xlp_config_link_msix()
389 		/* MSI-X addresses */  in xlp_config_link_msix()
398  *  Allocate a MSI-X vector
409 	/* Get MSI data for the link */  in xlp_setup_msix()
416 	/* switch the PCIe link to MSI-X mode at the first alloc */  in xlp_setup_msix()
420 	/* allocate a MSI-X vec, and tell the bridge about it */  in xlp_setup_msix()
475 	/* Alloc an MSI block for the link */  in xlp_init_node_msi_irqs()
484 	/* extended space for MSI interrupts */  in xlp_init_node_msi_irqs()
498 			/* Initialize MSI-X irts to generate one interrupt  in xlp_init_node_msi_irqs()
508 		/* Initialize MSI-X extended irq space for the link  */  in xlp_init_node_msi_irqs()
559 	/* narrow it down to the MSI-x vectors for our link */  in nlm_dispatch_msix()