Lines Matching +full:differ +full:-

20 #include <asm/cpu-type.h>
30 * LOONGSON-2 has a 4 entry itlb which is a subset of jtlb, LOONGSON-3 has
50 if (vma->vm_flags & VM_EXEC) in flush_micro_tlb_vm()
90 /* Make sure all entries differ. */ in local_flush_tlb_all()
109 struct mm_struct *mm = vma->vm_mm; in local_flush_tlb_range()
118 size = (end - start) >> (PAGE_SHIFT + 1); in local_flush_tlb_range()
148 /* Make sure all entries differ. */ in local_flush_tlb_range()
171 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; in local_flush_tlb_kernel_range()
179 end += ((PAGE_SIZE << 1) - 1); in local_flush_tlb_kernel_range()
196 /* Make sure all entries differ. */ in local_flush_tlb_kernel_range()
215 if (cpu_context(cpu, vma->vm_mm) != 0) { in local_flush_tlb_page()
227 write_c0_memorymapid(cpu_asid(cpu, vma->vm_mm)); in local_flush_tlb_page()
229 write_c0_entryhi(page | cpu_asid(cpu, vma->vm_mm)); in local_flush_tlb_page()
239 /* Make sure all entries differ. */ in local_flush_tlb_page()
276 /* Make sure all entries differ. */ in local_flush_tlb_one()
306 if (current->active_mm != vma->vm_mm) in __update_tlb()
319 pgdp = pgd_offset(vma->vm_mm, address); in __update_tlb()
351 write_c0_entrylo0(pte_to_entrylo(ptep->pte_high)); in __update_tlb()
353 writex_c0_entrylo0(ptep->pte_low & _PFNX_MASK); in __update_tlb()
355 write_c0_entrylo1(pte_to_entrylo(ptep->pte_high)); in __update_tlb()
357 writex_c0_entrylo1(ptep->pte_low & _PFNX_MASK); in __update_tlb()
359 write_c0_entrylo0(ptep->pte_high); in __update_tlb()
361 write_c0_entrylo1(ptep->pte_high); in __update_tlb()
427 static unsigned int mask = -1; in has_transparent_hugepage()
429 if (mask == -1) { /* first call comes during __init */ in has_transparent_hugepage()
468 if (--temp_tlb_entry < wired) { in add_temporary_entry()
471 ret = -ENOSPC; in add_temporary_entry()
508 * - On R4600 1.7 the tlbp never hits for pages smaller than in r4k_tlb_configure()
510 * - The entire mm handling assumes the c0_pagemask register to in r4k_tlb_configure()
511 * be set to fixed-size pages. in r4k_tlb_configure()
537 temp_tlb_entry = current_cpu_data.tlbsize - 1; in r4k_tlb_configure()
551 int wired = current_cpu_data.tlbsize - ntlb; in tlb_init()
553 write_c0_index(wired-1); in tlb_init()