Lines Matching +full:im +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
22 /* register definitions - internal irqs */
31 /* register definitions - external irqs */
74 return -1; in ltq_eiu_get_irq()
79 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_disable_irq()
80 unsigned long im = offset / INT_NUM_IM_OFFSET; in ltq_disable_irq() local
88 ltq_icu_w32(vpe, im, in ltq_disable_irq()
89 ltq_icu_r32(vpe, im, LTQ_ICU_IER) & ~BIT(offset), in ltq_disable_irq()
97 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_mask_and_ack_irq()
98 unsigned long im = offset / INT_NUM_IM_OFFSET; in ltq_mask_and_ack_irq() local
106 ltq_icu_w32(vpe, im, in ltq_mask_and_ack_irq()
107 ltq_icu_r32(vpe, im, LTQ_ICU_IER) & ~BIT(offset), in ltq_mask_and_ack_irq()
109 ltq_icu_w32(vpe, im, BIT(offset), LTQ_ICU_ISR); in ltq_mask_and_ack_irq()
116 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_ack_irq()
117 unsigned long im = offset / INT_NUM_IM_OFFSET; in ltq_ack_irq() local
125 ltq_icu_w32(vpe, im, BIT(offset), LTQ_ICU_ISR); in ltq_ack_irq()
132 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_enable_irq()
133 unsigned long im = offset / INT_NUM_IM_OFFSET; in ltq_enable_irq() local
147 ltq_icu_w32(vpe, im, ltq_icu_r32(vpe, im, LTQ_ICU_IER) | BIT(offset), in ltq_enable_irq()
159 if (d->hwirq == ltq_eiu_irq[i]) { in ltq_eiu_settype()
186 type, d->hwirq); in ltq_eiu_settype()
187 return -EINVAL; in ltq_eiu_settype()
191 irq_set_handler(d->hwirq, handle_edge_irq); in ltq_eiu_settype()
210 if (d->hwirq == ltq_eiu_irq[i]) { in ltq_startup_eiu_irq()
232 if (d->hwirq == ltq_eiu_irq[i]) { in ltq_shutdown_eiu_irq()
248 return -EINVAL; in ltq_icu_irq_set_affinity()
287 unsigned int module = irq_desc_get_irq(desc) - 2; in ltq_hw_irq_handler()
387 eiu_node = of_find_compatible_node(NULL, NULL, "lantiq,eiu-xway"); in icu_of_init()
391 "lantiq,eiu-irqs"); in icu_of_init()
396 ret = of_property_read_u32_array(eiu_node, "lantiq,eiu-irqs", in icu_of_init()