Lines Matching +full:0 +full:x01c00000
51 for (x = 0; x < 100000; x++) \
69 #define LOONGSON_FLASH_BASE 0x1c000000
70 #define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */
73 #define LOONGSON_LIO0_BASE 0x1e000000
74 #define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */
77 #define LOONGSON_BOOT_BASE 0x1fc00000
78 #define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */
80 #define LOONGSON_REG_BASE 0x1fe00000
81 #define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */
84 #define LOONGSON_LIO1_BASE 0x1ff00000
85 #define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */
88 #define LOONGSON_PCILO0_BASE 0x10000000
89 #define LOONGSON_PCILO1_BASE 0x14000000
90 #define LOONGSON_PCILO2_BASE 0x18000000
92 #define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */
95 #define LOONGSON_PCICFG_BASE 0x1fe80000
96 #define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */
98 #define LOONGSON_PCIIO_BASE 0x1fd00000
100 #define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */
105 #define LOONGSON_PCICONFIGBASE 0x00
106 #define LOONGSON_REGBASE 0x100
111 #define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00)
112 #define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04)
113 #define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08)
114 #define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c)
115 #define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10)
116 #define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14)
117 #define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18)
118 #define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c)
119 #define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20)
120 #define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30)
121 #define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c)
123 #define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c)
125 #define LOONGSON_PCICMD_PERR_CLR 0x80000000
126 #define LOONGSON_PCICMD_SERR_CLR 0x40000000
127 #define LOONGSON_PCICMD_MABORT_CLR 0x20000000
128 #define LOONGSON_PCICMD_MTABORT_CLR 0x10000000
129 #define LOONGSON_PCICMD_TABORT_CLR 0x08000000
130 #define LOONGSON_PCICMD_MPERR_CLR 0x01000000
131 #define LOONGSON_PCICMD_PERRRESPEN 0x00000040
132 #define LOONGSON_PCICMD_ASTEPEN 0x00000080
133 #define LOONGSON_PCICMD_SERREN 0x00000100
134 #define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00
139 #define LOONGSON_GENCFG_OFFSET 0x4
142 #define LOONGSON_GENCFG_DEBUGMODE 0x00000001
143 #define LOONGSON_GENCFG_SNOOPEN 0x00000002
144 #define LOONGSON_GENCFG_CPUSELFRESET 0x00000004
146 #define LOONGSON_GENCFG_FORCE_IRQA 0x00000008
147 #define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010
148 #define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020
149 #define LOONGSON_GENCFG_BYTESWAP 0x00000040
151 #define LOONGSON_GENCFG_UNCACHED 0x00000080
152 #define LOONGSON_GENCFG_PREFETCHEN 0x00000100
153 #define LOONGSON_GENCFG_WBEHINDEN 0x00000200
154 #define LOONGSON_GENCFG_CACHEALG 0x00000c00
156 #define LOONGSON_GENCFG_PCIQUEUE 0x00001000
157 #define LOONGSON_GENCFG_CACHESTOP 0x00002000
158 #define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000
159 #define LOONGSON_GENCFG_BUSERREN 0x00008000
160 #define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000
161 #define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000
165 #define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10)
166 #define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14)
167 #define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18)
171 #define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
172 #define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20)
176 #define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24)
177 #define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28)
178 #define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c)
182 #define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30)
183 #define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34)
184 #define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38)
185 #define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c)
188 #define LOONGSON_ICU_MBOXES 0x0000000f
189 #define LOONGSON_ICU_MBOXES_SHIFT 0
190 #define LOONGSON_ICU_DMARDY 0x00000010
191 #define LOONGSON_ICU_DMAEMPTY 0x00000020
192 #define LOONGSON_ICU_COPYRDY 0x00000040
193 #define LOONGSON_ICU_COPYEMPTY 0x00000080
194 #define LOONGSON_ICU_COPYERR 0x00000100
195 #define LOONGSON_ICU_PCIIRQ 0x00000200
196 #define LOONGSON_ICU_MASTERERR 0x00000400
197 #define LOONGSON_ICU_SYSTEMERR 0x00000800
198 #define LOONGSON_ICU_DRAMPERR 0x00001000
199 #define LOONGSON_ICU_RETRYERR 0x00002000
200 #define LOONGSON_ICU_GPIOS 0x01ff0000
202 #define LOONGSON_ICU_GPINS 0x7e000000
210 #define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40)
211 #define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44)
212 #define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48)
213 #define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c)
217 #define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50)
218 #define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54)
219 #define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58)
220 #define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
221 #define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60)
222 #define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64)
226 #define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68)
227 #define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
230 #define LOONGSON_CHIPCFG (void __iomem *)TO_UNCAC(0x1fc00180)
234 #define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f
235 #define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0
236 #define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0
238 #define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000
240 #define LOONGSON_PCIMAP_PCIMAP_2 0x00040000
258 #define LOONGSON_ADDRWINCFG_BASE 0x3ff00000ul
259 #define LOONGSON_ADDRWINCFG_SIZE 0x180
265 #define CPU_WIN0_BASE LOONGSON_ADDRWINCFG(0x00)
266 #define CPU_WIN1_BASE LOONGSON_ADDRWINCFG(0x08)
267 #define CPU_WIN2_BASE LOONGSON_ADDRWINCFG(0x10)
268 #define CPU_WIN3_BASE LOONGSON_ADDRWINCFG(0x18)
270 #define CPU_WIN0_MASK LOONGSON_ADDRWINCFG(0x20)
271 #define CPU_WIN1_MASK LOONGSON_ADDRWINCFG(0x28)
272 #define CPU_WIN2_MASK LOONGSON_ADDRWINCFG(0x30)
273 #define CPU_WIN3_MASK LOONGSON_ADDRWINCFG(0x38)
275 #define CPU_WIN0_MMAP LOONGSON_ADDRWINCFG(0x40)
276 #define CPU_WIN1_MMAP LOONGSON_ADDRWINCFG(0x48)
277 #define CPU_WIN2_MMAP LOONGSON_ADDRWINCFG(0x50)
278 #define CPU_WIN3_MMAP LOONGSON_ADDRWINCFG(0x58)
280 #define PCIDMA_WIN0_BASE LOONGSON_ADDRWINCFG(0x60)
281 #define PCIDMA_WIN1_BASE LOONGSON_ADDRWINCFG(0x68)
282 #define PCIDMA_WIN2_BASE LOONGSON_ADDRWINCFG(0x70)
283 #define PCIDMA_WIN3_BASE LOONGSON_ADDRWINCFG(0x78)
285 #define PCIDMA_WIN0_MASK LOONGSON_ADDRWINCFG(0x80)
286 #define PCIDMA_WIN1_MASK LOONGSON_ADDRWINCFG(0x88)
287 #define PCIDMA_WIN2_MASK LOONGSON_ADDRWINCFG(0x90)
288 #define PCIDMA_WIN3_MASK LOONGSON_ADDRWINCFG(0x98)
290 #define PCIDMA_WIN0_MMAP LOONGSON_ADDRWINCFG(0xa0)
291 #define PCIDMA_WIN1_MMAP LOONGSON_ADDRWINCFG(0xa8)
292 #define PCIDMA_WIN2_MMAP LOONGSON_ADDRWINCFG(0xb0)
293 #define PCIDMA_WIN3_MMAP LOONGSON_ADDRWINCFG(0xb8)
295 #define ADDRWIN_WIN0 0
300 #define ADDRWIN_MAP_DST_DDR 0
307 * win: 0, 1, 2, 3
316 } while (0)