Lines Matching refs:MIPS_CP0_64
32 #define MIPS_CP0_64(_R, _S) \ macro
36 #define KVM_REG_MIPS_CP0_ENTRYLO0 MIPS_CP0_64(2, 0)
37 #define KVM_REG_MIPS_CP0_ENTRYLO1 MIPS_CP0_64(3, 0)
38 #define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
40 #define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2)
41 #define KVM_REG_MIPS_CP0_XCONTEXTCONFIG MIPS_CP0_64(4, 3)
44 #define KVM_REG_MIPS_CP0_SEGCTL0 MIPS_CP0_64(5, 2)
45 #define KVM_REG_MIPS_CP0_SEGCTL1 MIPS_CP0_64(5, 3)
46 #define KVM_REG_MIPS_CP0_SEGCTL2 MIPS_CP0_64(5, 4)
47 #define KVM_REG_MIPS_CP0_PWBASE MIPS_CP0_64(5, 5)
48 #define KVM_REG_MIPS_CP0_PWFIELD MIPS_CP0_64(5, 6)
49 #define KVM_REG_MIPS_CP0_PWSIZE MIPS_CP0_64(5, 7)
53 #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0)
57 #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0)
62 #define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0)
64 #define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1)
73 #define KVM_REG_MIPS_CP0_MAARI MIPS_CP0_64(17, 2)
74 #define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
76 #define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
77 #define KVM_REG_MIPS_CP0_KSCRATCH1 MIPS_CP0_64(31, 2)
78 #define KVM_REG_MIPS_CP0_KSCRATCH2 MIPS_CP0_64(31, 3)
79 #define KVM_REG_MIPS_CP0_KSCRATCH3 MIPS_CP0_64(31, 4)
80 #define KVM_REG_MIPS_CP0_KSCRATCH4 MIPS_CP0_64(31, 5)
81 #define KVM_REG_MIPS_CP0_KSCRATCH5 MIPS_CP0_64(31, 6)
82 #define KVM_REG_MIPS_CP0_KSCRATCH6 MIPS_CP0_64(31, 7)