239 	u32 cpu_pll, ddr_pll;  in ar934x_clocks_init()  local
304 	ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,  in ar934x_clocks_init()
317 		cpu_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
325 		ddr_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
335 		ahb_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
357 	u32 cpu_pll, ddr_pll;  in qca953x_clocks_init()  local
392 	ddr_pll = nint * ref_rate / ref_div;  in qca953x_clocks_init()
393 	ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4);  in qca953x_clocks_init()
394 	ddr_pll /= (1 << out_div);  in qca953x_clocks_init()
406 		cpu_rate = ddr_pll / (postdiv + 1);  in qca953x_clocks_init()
414 		ddr_rate = ddr_pll / (postdiv + 1);  in qca953x_clocks_init()
424 		ahb_rate = ddr_pll / (postdiv + 1);  in qca953x_clocks_init()
440 	u32 cpu_pll, ddr_pll;  in qca955x_clocks_init()  local
475 	ddr_pll = nint * ref_rate / ref_div;  in qca955x_clocks_init()
476 	ddr_pll += frac * ref_rate / (ref_div * (1 << 10));  in qca955x_clocks_init()
477 	ddr_pll /= (1 << out_div);  in qca955x_clocks_init()
487 		cpu_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
499 		ddr_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
507 		ahb_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
523 	u32 cpu_pll, ddr_pll;  in qca956x_clocks_init()  local
576 	ddr_pll = nint * ref_rate / ref_div;  in qca956x_clocks_init()
577 	ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13);  in qca956x_clocks_init()
578 	ddr_pll += (hfrac >> 13) * ref_rate / ref_div;  in qca956x_clocks_init()
579 	ddr_pll /= (1 << out_div);  in qca956x_clocks_init()
589 		cpu_rate = ddr_pll / (postdiv + 1);  in qca956x_clocks_init()
601 		ddr_rate = ddr_pll / (postdiv + 1);  in qca956x_clocks_init()
609 		ahb_rate = ddr_pll / (postdiv + 1);  in qca956x_clocks_init()