Lines Matching refs:SCC_WRITE
186 #define SCC_WRITE(reg, val) \ macro
243 SCC_WRITE(9, 0xc0); /* reset */ in atari_init_scc_port()
245 SCC_WRITE(4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) in atari_init_scc_port()
247 SCC_WRITE(3, reg3); in atari_init_scc_port()
248 SCC_WRITE(5, reg5); in atari_init_scc_port()
249 SCC_WRITE(9, 0); /* no interrupts */ in atari_init_scc_port()
251 SCC_WRITE(10, 0); /* NRZ mode */ in atari_init_scc_port()
252 SCC_WRITE(11, clksrc); /* main clock source */ in atari_init_scc_port()
253 SCC_WRITE(12, div); /* BRG value */ in atari_init_scc_port()
254 SCC_WRITE(13, 0); /* BRG high byte */ in atari_init_scc_port()
255 SCC_WRITE(14, brgsrc_table[baud]); in atari_init_scc_port()
256 SCC_WRITE(14, brgsrc_table[baud] | (div ? 1 : 0)); in atari_init_scc_port()
257 SCC_WRITE(3, reg3 | 1); in atari_init_scc_port()
258 SCC_WRITE(5, reg5 | 8); in atari_init_scc_port()