1 // SPDX-License-Identifier: GPL-2.0-only
6  * Copyright (C) 2003 Hewlett-Packard Co
7  *	David Mosberger-Tang <davidm@hpl.hp.com>
13  * Copyright (C) Jenna Hall <jenna.s.hall@intel.com>
21  * Copyright (C) 1999, 2004-2008 Silicon Graphics, Inc.
27  * 2000-03-29 Chuck Fleckenstein <cfleck@co.intel.com>
31  * 2001-01-03 Fred Lewis <frederick.v.lewis@intel.com>
37  * 2002-01-04 Jenna Hall <jenna.s.hall@intel.com>
42  * 2002-03-25 Matt Domsch <Matt_Domsch@dell.com>
45  * 2003-04-15 David Mosberger-Tang <davidm@hpl.hp.com>
48  * 2003-12-08 Keith Owens <kaos@sgi.com>
53  * 2004-02-01 Keith Owens <kaos@sgi.com>
60  * 2005-08-12 Keith Owens <kaos@sgi.com>
64  * 2005-10-07 Keith Owens <kaos@sgi.com>
67  * 2006-09-15 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
70  * 2007-04-27 Russ Anderson <rja@sgi.com>
131 DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
142 static int monarch_cpu = -1;
189 static int loglevel_save = -1;
199 		loglevel_save = -1;			\
267 			if (++printed_len >= MLOGBUF_MSGMAX - 1)  in ia64_mlogbuf_dump()
284  * invoked, long-wait rendezvous etc.)
348 #define IA64_MAX_LOGS		2	/* Double-buffering for nested MCAs */
365 #define IA64_LOG_CURR_INDEX(it)    1 - ia64_state_log[it].isl_index
367     {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
370     ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
405 		/* alloc_bootmem() doesn't like zero-sized allocations! */  in ia64_log_init()
483 	/* Clear logs from corrected errors in case there's no user-level logger */  in ia64_mca_log_sal_error_record()
485 	if (rh->severity == sal_log_severity_corrected)  in ia64_mca_log_sal_error_record()
512                 curr_start = (u64) &curr->start_addr + curr->start_addr;  in search_mca_table()
513                 curr_end = (u64) &curr->end_addr + curr->end_addr;  in search_mca_table()
529 	return search_mca_table(__start___mca_table, __stop___mca_table-1, addr);  in mca_recover_range()
533 int cpe_vector = -1;
534 int ia64_cpe_irq = -1;
556 			if (now - cpe_history[i] <= HZ)  in ia64_mca_cpe_int_handler()
627  *  This function is invoked on a per-processor basis.
656  *  This function is invoked on a per-processor basis.
682  *  This function is invoked on a per-processor basis.
697 	cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */  in ia64_mca_cmc_vector_enable()
720  * enable the cmc interrupt vector.
731  *	Send an inter-cpu interrupt to wake-up a particular cpu.
798 	while (monarch_cpu != -1)  in ia64_mca_rendez_int_handler()
804 	/* Enable all interrupts */  in ia64_mca_rendez_int_handler()
812  *	The interrupt handler for processing the inter-cpu interrupt to the
815  *	polling on the wakeup-interrupt bit in the IRR, there is
818  *  Inputs  :   wakeup_irq  (Wakeup-interrupt bit)
876 	char *p, comm[sizeof(current->comm)];  in ia64_mca_modify_comm()
877 	if (previous_current->pid)  in ia64_mca_modify_comm()
879 			current->comm, previous_current->pid);  in ia64_mca_modify_comm()
882 		if ((p = strchr(previous_current->comm, ' ')))  in ia64_mca_modify_comm()
883 			l = p - previous_current->comm;  in ia64_mca_modify_comm()
885 			l = strlen(previous_current->comm);  in ia64_mca_modify_comm()
887 			current->comm, l, previous_current->comm,  in ia64_mca_modify_comm()
888 			task_thread_info(previous_current)->cpu);  in ia64_mca_modify_comm()
890 	memcpy(current->comm, comm, sizeof(current->comm));  in ia64_mca_modify_comm()
897 	const pal_min_state_area_t *ms = sos->pal_min_state;  in finish_pt_regs()
903 	if (ia64_psr(regs)->ic) {  in finish_pt_regs()
904 		regs->cr_iip = ms->pmsa_iip;  in finish_pt_regs()
905 		regs->cr_ipsr = ms->pmsa_ipsr;  in finish_pt_regs()
906 		regs->cr_ifs = ms->pmsa_ifs;  in finish_pt_regs()
908 		regs->cr_iip = ms->pmsa_xip;  in finish_pt_regs()
909 		regs->cr_ipsr = ms->pmsa_xpsr;  in finish_pt_regs()
910 		regs->cr_ifs = ms->pmsa_xfs;  in finish_pt_regs()
912 		sos->iip = ms->pmsa_iip;  in finish_pt_regs()
913 		sos->ipsr = ms->pmsa_ipsr;  in finish_pt_regs()
914 		sos->ifs = ms->pmsa_ifs;  in finish_pt_regs()
916 	regs->pr = ms->pmsa_pr;  in finish_pt_regs()
917 	regs->b0 = ms->pmsa_br0;  in finish_pt_regs()
918 	regs->ar_rsc = ms->pmsa_rsc;  in finish_pt_regs()
919 	copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &regs->r1, nat);  in finish_pt_regs()
920 	copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &regs->r2, nat);  in finish_pt_regs()
921 	copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &regs->r3, nat);  in finish_pt_regs()
922 	copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &regs->r8, nat);  in finish_pt_regs()
923 	copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &regs->r9, nat);  in finish_pt_regs()
924 	copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &regs->r10, nat);  in finish_pt_regs()
925 	copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &regs->r11, nat);  in finish_pt_regs()
926 	copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &regs->r12, nat);  in finish_pt_regs()
927 	copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &regs->r13, nat);  in finish_pt_regs()
928 	copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &regs->r14, nat);  in finish_pt_regs()
929 	copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &regs->r15, nat);  in finish_pt_regs()
930 	if (ia64_psr(regs)->bn)  in finish_pt_regs()
931 		bank = ms->pmsa_bank1_gr;  in finish_pt_regs()
933 		bank = ms->pmsa_bank0_gr;  in finish_pt_regs()
934 	copy_reg(&bank[16-16], ms->pmsa_nat_bits, &regs->r16, nat);  in finish_pt_regs()
935 	copy_reg(&bank[17-16], ms->pmsa_nat_bits, &regs->r17, nat);  in finish_pt_regs()
936 	copy_reg(&bank[18-16], ms->pmsa_nat_bits, &regs->r18, nat);  in finish_pt_regs()
937 	copy_reg(&bank[19-16], ms->pmsa_nat_bits, &regs->r19, nat);  in finish_pt_regs()
938 	copy_reg(&bank[20-16], ms->pmsa_nat_bits, &regs->r20, nat);  in finish_pt_regs()
939 	copy_reg(&bank[21-16], ms->pmsa_nat_bits, &regs->r21, nat);  in finish_pt_regs()
940 	copy_reg(&bank[22-16], ms->pmsa_nat_bits, &regs->r22, nat);  in finish_pt_regs()
941 	copy_reg(&bank[23-16], ms->pmsa_nat_bits, &regs->r23, nat);  in finish_pt_regs()
942 	copy_reg(&bank[24-16], ms->pmsa_nat_bits, &regs->r24, nat);  in finish_pt_regs()
943 	copy_reg(&bank[25-16], ms->pmsa_nat_bits, &regs->r25, nat);  in finish_pt_regs()
944 	copy_reg(&bank[26-16], ms->pmsa_nat_bits, &regs->r26, nat);  in finish_pt_regs()
945 	copy_reg(&bank[27-16], ms->pmsa_nat_bits, &regs->r27, nat);  in finish_pt_regs()
946 	copy_reg(&bank[28-16], ms->pmsa_nat_bits, &regs->r28, nat);  in finish_pt_regs()
947 	copy_reg(&bank[29-16], ms->pmsa_nat_bits, &regs->r29, nat);  in finish_pt_regs()
948 	copy_reg(&bank[30-16], ms->pmsa_nat_bits, &regs->r30, nat);  in finish_pt_regs()
949 	copy_reg(&bank[31-16], ms->pmsa_nat_bits, &regs->r31, nat);  in finish_pt_regs()
973 	const pal_min_state_area_t *ms = sos->pal_min_state;  in ia64_mca_modify_original_stack()
982 	u64 slots, loadrs = regs->loadrs;  in ia64_mca_modify_original_stack()
983 	u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1];  in ia64_mca_modify_original_stack()
984 	u64 ar_bspstore = regs->ar_bspstore;  in ia64_mca_modify_original_stack()
985 	u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16);  in ia64_mca_modify_original_stack()
991 	if ((p = strchr(current->comm, ' ')))  in ia64_mca_modify_original_stack()
997 	regs->cr_ipsr = ms->pmsa_ipsr;  in ia64_mca_modify_original_stack()
998 	if (ia64_psr(regs)->dt == 0) {  in ia64_mca_modify_original_stack()
1010 	if (ia64_psr(regs)->rt == 0) {  in ia64_mca_modify_original_stack()
1037 	regs->loadrs = (new_bsp - new_bspstore) * 8 << 16;  in ia64_mca_modify_original_stack()
1049 	if (r13 != sos->prev_IA64_KR_CURRENT) {  in ia64_mca_modify_original_stack()
1054 	if (!mca_recover_range(ms->pmsa_iip)) {  in ia64_mca_modify_original_stack()
1055 		if ((r12 - r13) >= KERNEL_STACK_SIZE) {  in ia64_mca_modify_original_stack()
1059 		if ((ar_bspstore - r13) >= KERNEL_STACK_SIZE) {  in ia64_mca_modify_original_stack()
1068 		if ((ar_bsp - r13) >= KERNEL_STACK_SIZE) {  in ia64_mca_modify_original_stack()
1072 		size += (ia64_rse_skip_regs(old_bspstore, slots) - old_bspstore) * 8;  in ia64_mca_modify_original_stack()
1085 	p = (char *)r12 - sizeof(*regs);  in ia64_mca_modify_original_stack()
1088 	old_regs->loadrs = loadrs;  in ia64_mca_modify_original_stack()
1089 	old_unat = old_regs->ar_unat;  in ia64_mca_modify_original_stack()
1108 	p -= sizeof(struct switch_stack);  in ia64_mca_modify_original_stack()
1111 	old_sw->caller_unat = old_unat;  in ia64_mca_modify_original_stack()
1112 	old_sw->ar_fpsr = old_regs->ar_fpsr;  in ia64_mca_modify_original_stack()
1113 	copy_reg(&ms->pmsa_gr[4-1], ms->pmsa_nat_bits, &old_sw->r4, &old_unat);  in ia64_mca_modify_original_stack()
1114 	copy_reg(&ms->pmsa_gr[5-1], ms->pmsa_nat_bits, &old_sw->r5, &old_unat);  in ia64_mca_modify_original_stack()
1115 	copy_reg(&ms->pmsa_gr[6-1], ms->pmsa_nat_bits, &old_sw->r6, &old_unat);  in ia64_mca_modify_original_stack()
1116 	copy_reg(&ms->pmsa_gr[7-1], ms->pmsa_nat_bits, &old_sw->r7, &old_unat);  in ia64_mca_modify_original_stack()
1117 	old_sw->b0 = (u64)ia64_leave_kernel;  in ia64_mca_modify_original_stack()
1118 	old_sw->b1 = ms->pmsa_br1;  in ia64_mca_modify_original_stack()
1119 	old_sw->ar_pfs = 0;  in ia64_mca_modify_original_stack()
1120 	old_sw->ar_unat = old_unat;  in ia64_mca_modify_original_stack()
1121 	old_sw->pr = old_regs->pr | (1UL << PRED_NON_SYSCALL);  in ia64_mca_modify_original_stack()
1122 	previous_current->thread.ksp = (u64)p - 16;  in ia64_mca_modify_original_stack()
1137 	old_rnat = regs->ar_rnat;  in ia64_mca_modify_original_stack()
1138 	while (slots--) {  in ia64_mca_modify_original_stack()
1151 	old_sw->ar_bspstore = (unsigned long)old_bspstore;  in ia64_mca_modify_original_stack()
1152 	old_sw->ar_rnat = old_rnat;  in ia64_mca_modify_original_stack()
1154 	sos->prev_task = previous_current;  in ia64_mca_modify_original_stack()
1160 	old_unat = regs->ar_unat;  in ia64_mca_modify_original_stack()
1236 		p = ia64_idtrs[cpu] + (iord - 1) * IA64_TR_ALLOC_MAX;  in mca_insert_tr()
1237 		if (p->pte & 0x1) {  in mca_insert_tr()
1238 			old_rr = ia64_get_rr(p->ifa);  in mca_insert_tr()
1239 			if (old_rr != p->rr) {  in mca_insert_tr()
1240 				ia64_set_rr(p->ifa, p->rr);  in mca_insert_tr()
1243 			ia64_ptr(iord, p->ifa, p->itir >> 2);  in mca_insert_tr()
1246 				ia64_itr(0x1, i, p->ifa, p->pte, p->itir >> 2);  in mca_insert_tr()
1250 				ia64_itr(0x2, i, p->ifa, p->pte, p->itir >> 2);  in mca_insert_tr()
1253 			if (old_rr != p->rr) {  in mca_insert_tr()
1254 				ia64_set_rr(p->ifa, old_rr);  in mca_insert_tr()
1268  *	Right now the logs are extracted and displayed in a well-defined
1272  *	Monarch also has the duty of sending wakeup-IPIs to pull the
1295 		sos->monarch = 1;  in ia64_mca_handler()
1298 		sos->monarch = 0;  in ia64_mca_handler()
1301 		"monarch=%ld\n", sos->proc_state_param, cpu, sos->monarch);  in ia64_mca_handler()
1308 	if (sos->monarch) {  in ia64_mca_handler()
1337 		rh->severity = sal_log_severity_corrected;  in ia64_mca_handler()
1339 		sos->os_status = IA64_MCA_CORRECTED;  in ia64_mca_handler()
1362 				while (monarch_cpu != -1)  in ia64_mca_handler()
1373 	monarch_cpu = -1;	/* This frees the slaves and previous monarchs */  in ia64_mca_handler()
1383  *	Right now the logs are extracted and displayed in a well-defined
1412 			if (now - cmc_history[i] <= HZ)  in ia64_mca_cmc_int_handler()
1471 	static int start_count = -1;  in ia64_mca_cmc_int_caller()
1477 	if (start_count == -1)  in ia64_mca_cmc_int_caller()
1499 		start_count = -1;  in ia64_mca_cmc_int_caller()
1538 	static int start_count = -1;  in ia64_mca_cpe_int_caller()
1545 	if (start_count == -1)  in ia64_mca_cpe_int_caller()
1573 		start_count = -1;  in ia64_mca_cpe_int_caller()
1611 	 * To enable show_stack from INIT, we use oops_in_progress which should  in default_monarch_init_process()
1617 	printk(KERN_ERR "Processes interrupted by INIT -");  in default_monarch_init_process()
1622 		g = s->prev_task;  in default_monarch_init_process()
1624 			if (g->pid)  in default_monarch_init_process()
1625 				printk(" %d", g->pid);  in default_monarch_init_process()
1627 				printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);  in default_monarch_init_process()
1633 			printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);  in default_monarch_init_process()
1650  * sos->monarch.
1674 		sos->proc_state_param, cpu, sos->monarch);  in ia64_init_handler()
1678 	sos->os_status = IA64_INIT_RESUME;  in ia64_init_handler()
1685 	if (!sos->monarch && atomic_add_return(1, &slaves) == num_online_cpus()) {  in ia64_init_handler()
1689 		sos->monarch = 1;  in ia64_init_handler()
1697 	if (sos->monarch && atomic_add_return(1, &monarchs) > 1) {  in ia64_init_handler()
1701 		sos->monarch = 0;  in ia64_init_handler()
1704 	if (!sos->monarch) {  in ia64_init_handler()
1708 		while (monarch_cpu == -1 && !atomic_read(&kdump_in_progress))  in ia64_init_handler()
1711 		while (monarch_cpu == -1)  in ia64_init_handler()
1719 		while (monarch_cpu != -1 && !atomic_read(&kdump_in_progress))  in ia64_init_handler()
1722 		while (monarch_cpu != -1)  in ia64_init_handler()
1740 	 * generated via the BMC's command-line interface, but since the console is on the  in ia64_init_handler()
1757 	monarch_cpu = -1;  in ia64_init_handler()
1784 	ti->flags = _TIF_MCA_INIT;  in format_mca_init_stack()
1785 	ti->preempt_count = 1;  in format_mca_init_stack()
1786 	ti->task = p;  in format_mca_init_stack()
1787 	ti->cpu = cpu;  in format_mca_init_stack()
1788 	p->stack = ti;  in format_mca_init_stack()
1789 	p->state = TASK_UNINTERRUPTIBLE;  in format_mca_init_stack()
1790 	cpumask_set_cpu(cpu, &p->cpus_mask);  in format_mca_init_stack()
1791 	INIT_LIST_HEAD(&p->tasks);  in format_mca_init_stack()
1792 	p->parent = p->real_parent = p->group_leader = p;  in format_mca_init_stack()
1793 	INIT_LIST_HEAD(&p->children);  in format_mca_init_stack()
1794 	INIT_LIST_HEAD(&p->sibling);  in format_mca_init_stack()
1795 	strncpy(p->comm, type, sizeof(p->comm)-1);  in format_mca_init_stack()
1804 /* Do per-CPU MCA-related initialization.  */
1838 	 * Stash away a copy of the PTE needed to map the per-CPU page.  in ia64_mca_cpu_init()
1923 		if (rc == -2) {  in ia64_mca_init()
1949 	ia64_mc_info.imi_mca_handler        = ia64_tpa(mca_hldlr_ptr->fp);  in ia64_mca_init()
1951 	 * XXX - disable SAL checksum by setting size to 0; should be  in ia64_mca_init()
1952 	 *	ia64_tpa(ia64_os_mca_dispatch_end) - ia64_tpa(ia64_os_mca_dispatch);  in ia64_mca_init()
1959 				       ia64_tpa(mca_hldlr_ptr->gp),  in ia64_mca_init()
1969 		       ia64_mc_info.imi_mca_handler, ia64_tpa(mca_hldlr_ptr->gp));  in ia64_mca_init()
1972 	 * XXX - disable SAL checksum by setting size to 0, should be  in ia64_mca_init()
1975 	ia64_mc_info.imi_monarch_init_handler		= ia64_tpa(init_hldlr_ptr_monarch->fp);  in ia64_mca_init()
1977 	ia64_mc_info.imi_slave_init_handler		= ia64_tpa(init_hldlr_ptr_slave->fp);  in ia64_mca_init()
2022  * point at a non-existant action. Called from arch_early_irq_init().
2028 	 *  per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).  in ia64_mca_irq_init()
2068 	/* Unmask/enable the vector */  in ia64_mca_late_init()
2082 			/* If platform supports CPEI, enable the irq. */  in ia64_mca_late_init()