22 		 * For CPUs that are affected by ARM 1319367, we need to  in __tlb_switch_to_guest()
23 		 * avoid a host Stage-1 walk while we have the guest's  in __tlb_switch_to_guest()
25 		 * We're guaranteed that the S1 MMU is enabled, so we can  in __tlb_switch_to_guest()
37 	 * ensuring that we always have an ISB, but not two ISBs back  in __tlb_switch_to_guest()
67 	 * We could do so much better if we had the VA as well.  in __kvm_tlb_flush_vmid_ipa()
68 	 * Instead, we invalidate Stage-2 for this IPA, and the  in __kvm_tlb_flush_vmid_ipa()
75 	 * We have to ensure completion of the invalidation at Stage-2,  in __kvm_tlb_flush_vmid_ipa()
86 	 * If the host is running at EL1 and we have a VPIPT I-cache,  in __kvm_tlb_flush_vmid_ipa()
87 	 * then we must perform I-cache maintenance at EL2 in order for  in __kvm_tlb_flush_vmid_ipa()
89 	 * I-cache lines allocated with a different VMID, we don't need  in __kvm_tlb_flush_vmid_ipa()
90 	 * to worry about junk out of guest reset (we nuke the I-cache on  in __kvm_tlb_flush_vmid_ipa()
91 	 * VMID rollover), but we do need to be careful when remapping  in __kvm_tlb_flush_vmid_ipa()
96 	 * from EL1. To solve this, we invalidate the entire I-cache when  in __kvm_tlb_flush_vmid_ipa()
97 	 * unmapping a page from a guest if we have a VPIPT I-cache but  in __kvm_tlb_flush_vmid_ipa()
98 	 * the host is running at EL1. As above, we could do better if  in __kvm_tlb_flush_vmid_ipa()
99 	 * we had the VA.  in __kvm_tlb_flush_vmid_ipa()
150 	 * so we need to invalidate lines with a stale VMID to avoid an ABA  in __kvm_flush_vm_context()