Lines Matching +full:0 +full:x19

49 	.irp	n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29
58 #define BAD_SYNC	0
66 	.if	\el == 0
87 	tbnz	x0, #THREAD_SHIFT, 0f
92 0:
145 	nop					// Patched to SMC/HVC #0
180 	stp	x0, x1, [sp, #16 * 0]
189 	stp	x18, x19, [sp, #16 * 9]
196 	.if	\el == 0
206 	ldr	x19, [tsk, #TSK_TI_FLAGS]
207 	disable_step_tsk x19, x20
210 	check_mte_async_tcf x19, x22
224 	/* No need to reset PSTATE.UAO, hardware's already set it to 0 for us */
225 	.endif /* \el == 0 */
235 	.if \el == 0
251 	.if	\el == 0
265 	SET_PSTATE_TCO(0)
280 	.if	\el != 0
308 	.if	\el == 0
330 	apply_ssbd 0, x0, x1
335 	ldp	x0, x1, [sp, #16 * 0]
344 	ldp	x18, x19, [sp, #16 * 9]
353 	.if	\el == 0
400 1:	and	x22, x22, #~PSR_PAN_BIT		// ARMv8.0 CPUs do not understand this bit
417 	mov	x19, sp			// preserve the original sp
428 	eor	x25, x25, x19
448 	 * The callee-saved regs (x19-x29) should be preserved between
453 	mov	sp, x19
475 	 * Set res to 0 if irqs were unmasked in interrupted context.
476 	 * Otherwise set res to non-0 value.
524 	kernel_ventry	0, sync				// Synchronous 64-bit EL0
525 	kernel_ventry	0, irq				// IRQ 64-bit EL0
526 	kernel_ventry	0, fiq_invalid			// FIQ 64-bit EL0
527 	kernel_ventry	0, error			// Error 64-bit EL0
530 	kernel_ventry	0, sync_compat, 32		// Synchronous 32-bit EL0
531 	kernel_ventry	0, irq_compat, 32		// IRQ 32-bit EL0
532 	kernel_ventry	0, fiq_invalid_compat, 32	// FIQ 32-bit EL0
533 	kernel_ventry	0, error_compat, 32		// Error 32-bit EL0
535 	kernel_ventry	0, sync_invalid, 32		// Synchronous 32-bit EL0
536 	kernel_ventry	0, irq_invalid, 32		// IRQ 32-bit EL0
537 	kernel_ventry	0, fiq_invalid, 32		// FIQ 32-bit EL0
538 	kernel_ventry	0, error_invalid, 32		// Error 32-bit EL0
583 	inv_entry 0, BAD_SYNC
587 	inv_entry 0, BAD_IRQ
591 	inv_entry 0, BAD_FIQ
595 	inv_entry 0, BAD_ERROR
600 	inv_entry 0, BAD_FIQ, 32
652 	cbnz	x24, 1f				// preempt count != 0 || NMI return path
668 	kernel_entry 0
677 	kernel_entry 0, 32
685 	kernel_entry 0, 32
690 	kernel_entry 0, 32
697 	kernel_entry 0
722 	kernel_entry 0
744 	ldr	x19, [tsk, #TSK_TI_FLAGS]
745 	and	x2, x19, #_TIF_WORK_MASK
751 	enable_step_tsk x19, x2
755 	kernel_exit 0
762 	mov	x1, x19
764 	ldr	x19, [tsk, #TSK_TI_FLAGS]	// re-check for single-step
851 	.space	0x400
896 	stp	x19, x20, [x8], #16		// store callee-saved registers
904 	ldp	x19, x20, [x8], #16		// restore callee-saved registers
925 	cbz	x19, 1f				// not a kernel thread
927 	blr	x19
942 	smc	#0
944 99:	hvc	#0
1033 	stp     x18, x19, [x1, #SDEI_EVENT_INTREGS + 16 * 9]
1042 	mov	x19, x1
1045 	ldrb	w4, [x19, #SDEI_EVENT_PRIORITY]
1081 	and     x0, x3, #0xc
1090 	add	x0, x19, #SDEI_EVENT_INTREGS
1091 	mov	x1, x19
1096 	mov	x4, x19         // keep x4 for __sdei_asm_exit_trampoline
1098 	ldp	x18, x19, [x4, #SDEI_EVENT_INTREGS + 16 * 9]