Lines Matching +full:4 +full:b
11 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
12 .set .Lv\b\().4s, \b
44 sm3ss1 v5.4s, v8.4s, \t0\().4s, v9.4s
45 shl \t1\().4s, \t0\().4s, #1
46 sri \t1\().4s, \t0\().4s, #31
47 sm3tt1\ab v8.4s, v5.4s, v10.4s, \i
48 sm3tt2\ab v9.4s, v5.4s, \s0\().4s, \i
53 ext \s4\().16b, \s1\().16b, \s2\().16b, #12
54 ext v6.16b, \s0\().16b, \s1\().16b, #12
55 ext v7.16b, \s2\().16b, \s3\().16b, #8
56 sm3partw1 \s4\().4s, \s0\().4s, \s3\().4s
59 eor v10.16b, \s0\().16b, \s1\().16b
67 sm3partw2 \s4\().4s, v7.4s, v6.4s
78 ld1 {v8.4s-v9.4s}, [x0]
79 rev64 v8.4s, v8.4s
80 rev64 v9.4s, v9.4s
81 ext v8.16b, v8.16b, v8.16b, #8
82 ext v9.16b, v9.16b, v9.16b, #8
88 0: ld1 {v0.16b-v3.16b}, [x1], #64
91 mov v15.16b, v8.16b
92 mov v16.16b, v9.16b
94 CPU_LE( rev32 v0.16b, v0.16b )
95 CPU_LE( rev32 v1.16b, v1.16b )
96 CPU_LE( rev32 v2.16b, v2.16b )
97 CPU_LE( rev32 v3.16b, v3.16b )
99 ext v11.16b, v13.16b, v13.16b, #4
106 ext v11.16b, v14.16b, v14.16b, #4
108 qround b, v4, v0, v1, v2, v3
109 qround b, v0, v1, v2, v3, v4
110 qround b, v1, v2, v3, v4, v0
111 qround b, v2, v3, v4, v0, v1
112 qround b, v3, v4, v0, v1, v2
113 qround b, v4, v0, v1, v2, v3
114 qround b, v0, v1, v2, v3, v4
115 qround b, v1, v2, v3, v4, v0
116 qround b, v2, v3, v4, v0, v1
117 qround b, v3, v4
118 qround b, v4, v0
119 qround b, v0, v1
121 eor v8.16b, v8.16b, v15.16b
122 eor v9.16b, v9.16b, v16.16b
125 cbnz w2, 0b
128 rev64 v8.4s, v8.4s
129 rev64 v9.4s, v9.4s
130 ext v8.16b, v8.16b, v8.16b, #8
131 ext v9.16b, v9.16b, v9.16b, #8
132 st1 {v8.4s-v9.4s}, [x0]