Lines Matching full:4
42 // on Cortex-A53 (or by 4 cycles per round).
95 sub sp,sp,#4*4
98 ldp w22,w23,[x0,#2*4]
99 ldp w24,w25,[x0,#4*4]
101 ldp w26,w27,[x0,#6*4]
106 ldp w3,w4,[x1],#2*4
107 ldr w19,[x30],#4 // *K++
131 ldr w28,[x30],#4 // *K++, w19 in next round
136 ldp w5,w6,[x1],#2*4
156 ldr w19,[x30],#4 // *K++, w28 in next round
180 ldr w28,[x30],#4 // *K++, w19 in next round
185 ldp w7,w8,[x1],#2*4
205 ldr w19,[x30],#4 // *K++, w28 in next round
208 rev w7,w7 // 4
229 ldr w28,[x30],#4 // *K++, w19 in next round
234 ldp w9,w10,[x1],#2*4
254 ldr w19,[x30],#4 // *K++, w28 in next round
278 ldr w28,[x30],#4 // *K++, w19 in next round
283 ldp w11,w12,[x1],#2*4
303 ldr w19,[x30],#4 // *K++, w28 in next round
327 ldr w28,[x30],#4 // *K++, w19 in next round
332 ldp w13,w14,[x1],#2*4
352 ldr w19,[x30],#4 // *K++, w28 in next round
376 ldr w28,[x30],#4 // *K++, w19 in next round
381 ldp w15,w0,[x1],#2*4
402 ldr w19,[x30],#4 // *K++, w28 in next round
427 ldr w28,[x30],#4 // *K++, w19 in next round
434 str w8,[sp,#4]
453 ldr w19,[x30],#4 // *K++, w28 in next round
479 ldr w28,[x30],#4 // *K++, w19 in next round
512 ldr w19,[x30],#4 // *K++, w28 in next round
517 ldr w8,[sp,#4]
544 ldr w28,[x30],#4 // *K++, w19 in next round
549 str w12,[sp,#4]
575 ldr w19,[x30],#4 // *K++, w28 in next round
606 ldr w28,[x30],#4 // *K++, w19 in next round
637 ldr w19,[x30],#4 // *K++, w28 in next round
641 ldr w12,[sp,#4]
668 ldr w28,[x30],#4 // *K++, w19 in next round
673 str w0,[sp,#4]
699 ldr w19,[x30],#4 // *K++, w28 in next round
730 ldr w28,[x30],#4 // *K++, w19 in next round
761 ldr w19,[x30],#4 // *K++, w28 in next round
765 ldr w0,[sp,#4]
792 ldr w28,[x30],#4 // *K++, w19 in next round
797 str w4,[sp,#4]
823 ldr w19,[x30],#4 // *K++, w28 in next round
854 ldr w28,[x30],#4 // *K++, w19 in next round
885 ldr w19,[x30],#4 // *K++, w28 in next round
889 ldr w4,[sp,#4]
916 ldr w28,[x30],#4 // *K++, w19 in next round
921 str w8,[sp,#4]
947 ldr w19,[x30],#4 // *K++, w28 in next round
978 ldr w28,[x30],#4 // *K++, w19 in next round
1009 ldr w19,[x30],#4 // *K++, w28 in next round
1020 ldp w5,w6,[x0,#2*4]
1021 add x1,x1,#14*4 // advance input pointer
1022 ldp w7,w8,[x0,#4*4]
1024 ldp w9,w10,[x0,#6*4]
1031 stp w22,w23,[x0,#2*4]
1035 stp w24,w25,[x0,#4*4]
1036 stp w26,w27,[x0,#6*4]
1040 add sp,sp,#4*4
1089 ld1 {v0.4s,v1.4s},[x0]
1095 ld1 {v16.4s},[x3],#16
1102 ld1 {v17.4s},[x3],#16
1103 add v16.4s,v16.4s,v4.4s
1106 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1107 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1109 ld1 {v16.4s},[x3],#16
1110 add v17.4s,v17.4s,v5.4s
1113 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1114 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1116 ld1 {v17.4s},[x3],#16
1117 add v16.4s,v16.4s,v6.4s
1120 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1121 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1123 ld1 {v16.4s},[x3],#16
1124 add v17.4s,v17.4s,v7.4s
1127 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1128 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1130 ld1 {v17.4s},[x3],#16
1131 add v16.4s,v16.4s,v4.4s
1134 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1135 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1137 ld1 {v16.4s},[x3],#16
1138 add v17.4s,v17.4s,v5.4s
1141 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1142 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1144 ld1 {v17.4s},[x3],#16
1145 add v16.4s,v16.4s,v6.4s
1148 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1149 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1151 ld1 {v16.4s},[x3],#16
1152 add v17.4s,v17.4s,v7.4s
1155 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1156 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1158 ld1 {v17.4s},[x3],#16
1159 add v16.4s,v16.4s,v4.4s
1162 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1163 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1165 ld1 {v16.4s},[x3],#16
1166 add v17.4s,v17.4s,v5.4s
1169 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1170 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1172 ld1 {v17.4s},[x3],#16
1173 add v16.4s,v16.4s,v6.4s
1176 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1177 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1179 ld1 {v16.4s},[x3],#16
1180 add v17.4s,v17.4s,v7.4s
1183 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1184 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1186 ld1 {v17.4s},[x3],#16
1187 add v16.4s,v16.4s,v4.4s
1189 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1190 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1192 ld1 {v16.4s},[x3],#16
1193 add v17.4s,v17.4s,v5.4s
1195 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1196 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1198 ld1 {v17.4s},[x3]
1199 add v16.4s,v16.4s,v6.4s
1200 sub x3,x3,#64*4-16 // rewind
1202 .inst 0x5e104020 //sha256h v0.16b,v1.16b,v16.4s
1203 .inst 0x5e105041 //sha256h2 v1.16b,v2.16b,v16.4s
1205 add v17.4s,v17.4s,v7.4s
1207 .inst 0x5e114020 //sha256h v0.16b,v1.16b,v17.4s
1208 .inst 0x5e115041 //sha256h2 v1.16b,v2.16b,v17.4s
1210 add v0.4s,v0.4s,v18.4s
1211 add v1.4s,v1.4s,v19.4s
1215 st1 {v0.4s,v1.4s},[x0]
1225 .align 4
1230 sub sp,sp,#16*4
1239 ld1 {v4.4s},[x16], #16
1240 ld1 {v5.4s},[x16], #16
1241 ld1 {v6.4s},[x16], #16
1242 ld1 {v7.4s},[x16], #16
1248 add v4.4s,v4.4s,v0.4s
1249 add v5.4s,v5.4s,v1.4s
1250 add v6.4s,v6.4s,v2.4s
1251 st1 {v4.4s-v5.4s},[x17], #32
1252 add v7.4s,v7.4s,v3.4s
1253 st1 {v6.4s-v7.4s},[x17]
1266 .align 4
1268 ext v4.16b,v0.16b,v1.16b,#4
1273 ext v7.16b,v2.16b,v3.16b,#4
1279 ushr v6.4s,v4.4s,#7
1281 ushr v5.4s,v4.4s,#3
1283 add v0.4s,v0.4s,v7.4s
1285 sli v6.4s,v4.4s,#25
1288 ushr v7.4s,v4.4s,#18
1290 ldr w12,[sp,#4]
1295 sli v7.4s,v4.4s,#14
1297 ushr v16.4s,v19.4s,#17
1304 sli v16.4s,v19.4s,#15
1307 ushr v17.4s,v19.4s,#10
1310 ushr v7.4s,v19.4s,#19
1313 add v0.4s,v0.4s,v5.4s
1316 sli v7.4s,v19.4s,#13
1328 add v0.4s,v0.4s,v17.4s
1332 ushr v18.4s,v0.4s,#17
1334 ushr v19.4s,v0.4s,#10
1337 sli v18.4s,v0.4s,#15
1339 ushr v17.4s,v0.4s,#19
1345 sli v17.4s,v0.4s,#13
1349 ld1 {v4.4s},[x16], #16
1361 add v0.4s,v0.4s,v17.4s
1365 add v4.4s,v4.4s,v0.4s
1376 st1 {v4.4s},[x17], #16
1377 ext v4.16b,v1.16b,v2.16b,#4
1382 ext v7.16b,v3.16b,v0.16b,#4
1388 ushr v6.4s,v4.4s,#7
1390 ushr v5.4s,v4.4s,#3
1392 add v1.4s,v1.4s,v7.4s
1394 sli v6.4s,v4.4s,#25
1397 ushr v7.4s,v4.4s,#18
1404 sli v7.4s,v4.4s,#14
1406 ushr v16.4s,v19.4s,#17
1413 sli v16.4s,v19.4s,#15
1416 ushr v17.4s,v19.4s,#10
1419 ushr v7.4s,v19.4s,#19
1422 add v1.4s,v1.4s,v5.4s
1425 sli v7.4s,v19.4s,#13
1437 add v1.4s,v1.4s,v17.4s
1441 ushr v18.4s,v1.4s,#17
1443 ushr v19.4s,v1.4s,#10
1446 sli v18.4s,v1.4s,#15
1448 ushr v17.4s,v1.4s,#19
1454 sli v17.4s,v1.4s,#13
1458 ld1 {v4.4s},[x16], #16
1470 add v1.4s,v1.4s,v17.4s
1474 add v4.4s,v4.4s,v1.4s
1485 st1 {v4.4s},[x17], #16
1486 ext v4.16b,v2.16b,v3.16b,#4
1491 ext v7.16b,v0.16b,v1.16b,#4
1497 ushr v6.4s,v4.4s,#7
1499 ushr v5.4s,v4.4s,#3
1501 add v2.4s,v2.4s,v7.4s
1503 sli v6.4s,v4.4s,#25
1506 ushr v7.4s,v4.4s,#18
1513 sli v7.4s,v4.4s,#14
1515 ushr v16.4s,v19.4s,#17
1522 sli v16.4s,v19.4s,#15
1525 ushr v17.4s,v19.4s,#10
1528 ushr v7.4s,v19.4s,#19
1531 add v2.4s,v2.4s,v5.4s
1534 sli v7.4s,v19.4s,#13
1546 add v2.4s,v2.4s,v17.4s
1550 ushr v18.4s,v2.4s,#17
1552 ushr v19.4s,v2.4s,#10
1555 sli v18.4s,v2.4s,#15
1557 ushr v17.4s,v2.4s,#19
1563 sli v17.4s,v2.4s,#13
1567 ld1 {v4.4s},[x16], #16
1579 add v2.4s,v2.4s,v17.4s
1583 add v4.4s,v4.4s,v2.4s
1594 st1 {v4.4s},[x17], #16
1595 ext v4.16b,v3.16b,v0.16b,#4
1600 ext v7.16b,v1.16b,v2.16b,#4
1606 ushr v6.4s,v4.4s,#7
1608 ushr v5.4s,v4.4s,#3
1610 add v3.4s,v3.4s,v7.4s
1612 sli v6.4s,v4.4s,#25
1615 ushr v7.4s,v4.4s,#18
1622 sli v7.4s,v4.4s,#14
1624 ushr v16.4s,v19.4s,#17
1631 sli v16.4s,v19.4s,#15
1634 ushr v17.4s,v19.4s,#10
1637 ushr v7.4s,v19.4s,#19
1640 add v3.4s,v3.4s,v5.4s
1643 sli v7.4s,v19.4s,#13
1655 add v3.4s,v3.4s,v17.4s
1659 ushr v18.4s,v3.4s,#17
1661 ushr v19.4s,v3.4s,#10
1664 sli v18.4s,v3.4s,#15
1666 ushr v17.4s,v3.4s,#19
1672 sli v17.4s,v3.4s,#13
1676 ld1 {v4.4s},[x16], #16
1688 add v3.4s,v3.4s,v17.4s
1692 add v4.4s,v4.4s,v3.4s
1703 st1 {v4.4s},[x17], #16
1721 ld1 {v4.4s},[x16],#16
1731 add v4.4s,v4.4s,v0.4s
1733 ldr w12,[sp,#4]
1795 st1 {v4.4s},[x17], #16
1802 ld1 {v4.4s},[x16],#16
1812 add v4.4s,v4.4s,v1.4s
1876 st1 {v4.4s},[x17], #16
1883 ld1 {v4.4s},[x16],#16
1893 add v4.4s,v4.4s,v2.4s
1957 st1 {v4.4s},[x17], #16
1964 ld1 {v4.4s},[x16],#16
1974 add v4.4s,v4.4s,v3.4s
2037 st1 {v4.4s},[x17], #16
2064 add sp,sp,#16*4+16
2068 .comm OPENSSL_armcap_P,4,4