Lines Matching +full:dp +full:- +full:phy0
1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2019, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
19 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
42 gpio-keys {
43 compatible = "gpio-keys";
49 wakeup-source;
55 compatible = "gpio-leds";
56 heartbeat-led {
59 linux,default-trigger = "heartbeat";
63 ina226-u76 {
64 compatible = "iio-hwmon";
65 io-channels = <&u76 0>, <&u76 1>, <&u76 2>, <&u76 3>;
67 ina226-u77 {
68 compatible = "iio-hwmon";
69 io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
71 ina226-u78 {
72 compatible = "iio-hwmon";
73 io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>;
75 ina226-u87 {
76 compatible = "iio-hwmon";
77 io-channels = <&u87 0>, <&u87 1>, <&u87 2>, <&u87 3>;
79 ina226-u85 {
80 compatible = "iio-hwmon";
81 io-channels = <&u85 0>, <&u85 1>, <&u85 2>, <&u85 3>;
83 ina226-u86 {
84 compatible = "iio-hwmon";
85 io-channels = <&u86 0>, <&u86 1>, <&u86 2>, <&u86 3>;
87 ina226-u93 {
88 compatible = "iio-hwmon";
89 io-channels = <&u93 0>, <&u93 1>, <&u93 2>, <&u93 3>;
91 ina226-u88 {
92 compatible = "iio-hwmon";
93 io-channels = <&u88 0>, <&u88 1>, <&u88 2>, <&u88 3>;
95 ina226-u15 {
96 compatible = "iio-hwmon";
97 io-channels = <&u15 0>, <&u15 1>, <&u15 2>, <&u15 3>;
99 ina226-u92 {
100 compatible = "iio-hwmon";
101 io-channels = <&u92 0>, <&u92 1>, <&u92 2>, <&u92 3>;
103 ina226-u79 {
104 compatible = "iio-hwmon";
105 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
107 ina226-u81 {
108 compatible = "iio-hwmon";
109 io-channels = <&u81 0>, <&u81 1>, <&u81 2>, <&u81 3>;
111 ina226-u80 {
112 compatible = "iio-hwmon";
113 io-channels = <&u80 0>, <&u80 1>, <&u80 2>, <&u80 3>;
115 ina226-u84 {
116 compatible = "iio-hwmon";
117 io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>;
119 ina226-u16 {
120 compatible = "iio-hwmon";
121 io-channels = <&u16 0>, <&u16 1>, <&u16 2>, <&u16 3>;
123 ina226-u65 {
124 compatible = "iio-hwmon";
125 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
127 ina226-u74 {
128 compatible = "iio-hwmon";
129 io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>;
131 ina226-u75 {
132 compatible = "iio-hwmon";
133 io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
179 phy-handle = <&phy0>;
180 phy-mode = "rgmii-id";
181 phy0: ethernet-phy@21 { label
183 ti,rx-internal-delay = <0x8>;
184 ti,tx-internal-delay = <0xa>;
185 ti,fifo-depth = <0x1>;
186 ti,dp83867-rxctrl-strap-quirk;
196 clock-frequency = <400000>;
201 gpio-controller; /* IRQ not connected */
202 #gpio-cells = <2>;
203 gpio-line-names = "PS_GTR_LAN_SEL0", "PS_GTR_LAN_SEL1", "PS_GTR_LAN_SEL2", "PS_GTR_LAN_SEL3",
206 gtr-sel0-hog {
207 gpio-hog;
209 output-low; /* PCIE = 0, DP = 1 */
210 line-name = "sel0";
212 gtr-sel1-hog {
213 gpio-hog;
215 output-high; /* PCIE = 0, DP = 1 */
216 line-name = "sel1";
218 gtr-sel2-hog {
219 gpio-hog;
221 output-high; /* PCIE = 0, USB0 = 1 */
222 line-name = "sel2";
224 gtr-sel3-hog {
225 gpio-hog;
227 output-high; /* PCIE = 0, SATA = 1 */
228 line-name = "sel3";
235 gpio-controller; /* IRQ not connected */
236 #gpio-cells = <2>;
237 …gpio-line-names = "VCCPSPLL_EN", "MGTRAVCC_EN", "MGTRAVTT_EN", "VCCPSDDRPLL_EN", "MIO26_PMU_INPUT_…
243 i2c-mux@75 { /* u60 */
245 #address-cells = <1>;
246 #size-cells = <0>;
249 #address-cells = <1>;
250 #size-cells = <0>;
255 #io-channel-cells = <1>;
256 label = "ina226-u76";
258 shunt-resistor = <5000>;
262 #io-channel-cells = <1>;
263 label = "ina226-u77";
265 shunt-resistor = <5000>;
269 #io-channel-cells = <1>;
270 label = "ina226-u78";
272 shunt-resistor = <5000>;
276 #io-channel-cells = <1>;
277 label = "ina226-u87";
279 shunt-resistor = <5000>;
283 #io-channel-cells = <1>;
284 label = "ina226-u85";
286 shunt-resistor = <5000>;
290 #io-channel-cells = <1>;
291 label = "ina226-u86";
293 shunt-resistor = <5000>;
297 #io-channel-cells = <1>;
298 label = "ina226-u93";
300 shunt-resistor = <5000>;
304 #io-channel-cells = <1>;
305 label = "ina226-u88";
307 shunt-resistor = <5000>;
311 #io-channel-cells = <1>;
312 label = "ina226-u15";
314 shunt-resistor = <5000>;
318 #io-channel-cells = <1>;
319 label = "ina226-u92";
321 shunt-resistor = <5000>;
325 #address-cells = <1>;
326 #size-cells = <0>;
331 #io-channel-cells = <1>;
332 label = "ina226-u79";
334 shunt-resistor = <2000>;
338 #io-channel-cells = <1>;
339 label = "ina226-u81";
341 shunt-resistor = <5000>;
345 #io-channel-cells = <1>;
346 label = "ina226-u80";
348 shunt-resistor = <5000>;
352 #io-channel-cells = <1>;
353 label = "ina226-u84";
355 shunt-resistor = <5000>;
359 #io-channel-cells = <1>;
360 label = "ina226-u16";
362 shunt-resistor = <5000>;
366 #io-channel-cells = <1>;
367 label = "ina226-u65";
369 shunt-resistor = <5000>;
373 #io-channel-cells = <1>;
374 label = "ina226-u74";
376 shunt-resistor = <5000>;
380 #io-channel-cells = <1>;
381 label = "ina226-u75";
383 shunt-resistor = <5000>;
387 #address-cells = <1>;
388 #size-cells = <0>;
390 /* MAXIM_PMBUS - 00 */
456 clock-frequency = <400000>;
458 /* PL i2c via PCA9306 - u45 */
459 i2c-mux@74 { /* u34 */
461 #address-cells = <1>;
462 #size-cells = <0>;
465 #address-cells = <1>;
466 #size-cells = <0>;
471 * 0 - 256B address 0x54
472 * 256B - 512B address 0x55
473 * 512B - 768B address 0x56
474 * 768B - 1024B address 0x57
482 #address-cells = <1>;
483 #size-cells = <0>;
485 si5341: clock-generator@36 { /* SI5341 - u69 */
491 #address-cells = <1>;
492 #size-cells = <0>;
494 si570_1: clock-generator@5d { /* USER SI570 - u42 */
495 #clock-cells = <0>;
498 temperature-stability = <50>;
499 factory-fout = <300000000>;
500 clock-frequency = <300000000>;
501 clock-output-names = "si570_user";
505 #address-cells = <1>;
506 #size-cells = <0>;
508 si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
509 #clock-cells = <0>;
512 temperature-stability = <50>; /* copy from zc702 */
513 factory-fout = <156250000>;
514 clock-frequency = <148500000>;
515 clock-output-names = "si570_mgt";
519 #address-cells = <1>;
520 #size-cells = <0>;
522 si5328: clock-generator@69 {/* SI5328 - u20 */
526 * interrupt-parent = <&>;
531 /* 5 - 7 unconnected */
534 i2c-mux@75 {
536 #address-cells = <1>;
537 #size-cells = <0>;
541 #address-cells = <1>;
542 #size-cells = <0>;
547 #address-cells = <1>;
548 #size-cells = <0>;
553 #address-cells = <1>;
554 #size-cells = <0>;
559 #address-cells = <1>;
560 #size-cells = <0>;
565 #address-cells = <1>;
566 #size-cells = <0>;
571 #address-cells = <1>;
572 #size-cells = <0>;
577 #address-cells = <1>;
578 #size-cells = <0>;
583 #address-cells = <1>;
584 #size-cells = <0>;
602 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
603 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
604 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
605 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
606 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
607 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
608 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
609 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
615 no-1-8-v;