Lines Matching +full:0 +full:x4040
11 reg = <0x0 0x40f00000 0x0 0x20000>;
14 ranges = <0x0 0x0 0x40f00000 0x20000>;
18 reg = <0x4040 0x4>;
25 reg = <0x00 0x40a00000 0x00 0x100>;
36 reg = <0x00 0x41c00000 0x00 0x80000>;
37 ranges = <0x0 0x00 0x41c00000 0x80000>;
44 reg = <0x0 0x40b00000 0x0 0x100>;
47 #size-cells = <0>;
55 reg = <0x0 0x40300000 0x0 0x400>;
60 #size-cells = <0>;
65 reg = <0x0 0x40310000 0x0 0x400>;
70 #size-cells = <0>;
75 reg = <0x0 0x40320000 0x0 0x400>;
80 #size-cells = <0>;
85 reg = <0x0 0x40200000 0x0 0x1000>;
87 clocks = <&k3_clks 0 2>;
88 assigned-clocks = <&k3_clks 0 2>;
91 dmas = <&mcu_udmap 0x7100>,
92 <&mcu_udmap 0x7101 >;
103 reg = <0x0 0x40210000 0x0 0x1000>;
109 dmas = <&mcu_udmap 0x7102>,
110 <&mcu_udmap 0x7103>;
131 reg = <0x0 0x2b800000 0x0 0x400000>,
132 <0x0 0x2b000000 0x0 0x400000>,
133 <0x0 0x28590000 0x0 0x100>,
134 <0x0 0x2a500000 0x0 0x40000>;
137 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
146 reg = <0x0 0x285c0000 0x0 0x100>,
147 <0x0 0x2a800000 0x0 0x40000>,
148 <0x0 0x2aa00000 0x0 0x40000>;
157 ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
158 <0xd>; /* TX_CHAN */
159 ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
160 <0xa>; /* RX_CHAN */
161 ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
173 reg = <0x0 0x47040000 0x0 0x100>,
174 <0x5 0x00000000 0x1 0x0000000>;
178 cdns,trigger-address = <0x0>;
179 clocks = <&k3_clks 248 0>;
180 assigned-clocks = <&k3_clks 248 0>;
185 #size-cells = <0>;
190 reg = <0x0 0x47050000 0x0 0x100>,
191 <0x7 0x00000000 0x1 0x00000000>;
195 cdns,trigger-address = <0x0>;
199 #size-cells = <0>;
207 reg = <0x0 0x46000000 0x0 0x200000>;
209 ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
215 dmas = <&mcu_udmap 0xf000>,
216 <&mcu_udmap 0xf001>,
217 <&mcu_udmap 0xf002>,
218 <&mcu_udmap 0xf003>,
219 <&mcu_udmap 0xf004>,
220 <&mcu_udmap 0xf005>,
221 <&mcu_udmap 0xf006>,
222 <&mcu_udmap 0xf007>,
223 <&mcu_udmap 0x7000>;
230 #size-cells = <0>;
236 ti,syscon-efuse = <&mcu_conf 0x200>;
243 reg = <0x0 0xf00 0x0 0x100>;
245 #size-cells = <0>;
253 reg = <0x0 0x3d000 0x0 0x400>;
262 #clock-cells = <0>;