Lines Matching +full:0 +full:xff680000
44 #size-cells = <0>;
72 cpu_l0: cpu@0 {
75 reg = <0x0 0x0>;
87 reg = <0x0 0x1>;
99 reg = <0x0 0x2>;
111 reg = <0x0 0x3>;
123 reg = <0x0 0x100>;
135 reg = <0x0 0x101>;
150 arm,psci-suspend-param = <0x0010000>;
159 arm,psci-suspend-param = <0x1010000>;
189 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
190 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
191 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
192 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
200 #clock-cells = <0>;
211 reg = <0x0 0xff6d0000 0x0 0x4000>;
212 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
213 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
222 reg = <0x0 0xff6e0000 0x0 0x4000>;
223 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
224 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
234 reg = <0x0 0xf8000000 0x0 0x2000000>,
235 <0x0 0xfd000000 0x0 0x1000000>;
241 bus-range = <0x0 0x1f>;
246 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
247 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
248 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
250 interrupt-map-mask = <0 0 0 7>;
251 interrupt-map = <0 0 0 1 &pcie0_intc 0>,
252 <0 0 0 2 &pcie0_intc 1>,
253 <0 0 0 3 &pcie0_intc 2>,
254 <0 0 0 4 &pcie0_intc 3>;
255 linux,pci-domain = <0>;
257 msi-map = <0x0 &its 0x0 0x1000>;
258 phys = <&pcie_phy 0>, <&pcie_phy 1>,
260 phy-names = "pcie-phy-0", "pcie-phy-1",
262 ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000
263 0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
274 #address-cells = <0>;
281 reg = <0x0 0xfe300000 0x0 0x10000>;
282 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
296 snps,txpbl = <0x4>;
303 reg = <0x0 0xfe310000 0x0 0x4000>;
304 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
309 fifo-depth = <0x100>;
319 reg = <0x0 0xfe320000 0x0 0x4000>;
320 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
327 fifo-depth = <0x100>;
336 reg = <0x0 0xfe330000 0x0 0x10000>;
337 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
344 #clock-cells = <0>;
354 reg = <0x0 0xfe380000 0x0 0x20000>;
355 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
365 reg = <0x0 0xfe3a0000 0x0 0x20000>;
366 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
376 reg = <0x0 0xfe3c0000 0x0 0x20000>;
377 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
387 reg = <0x0 0xfe3e0000 0x0 0x20000>;
388 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
413 reg = <0x0 0xfe800000 0x0 0x100000>;
414 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
449 reg = <0x0 0xfe900000 0x0 0x100000>;
450 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
470 reg = <0x0 0xfec00000 0x0 0x100000>;
471 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
489 #size-cells = <0>;
491 dp_in_vopb: endpoint@0 {
492 reg = <0>;
512 reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
513 <0x0 0xfef00000 0 0xc0000>, /* GICR */
514 <0x0 0xfff00000 0 0x10000>, /* GICC */
515 <0x0 0xfff10000 0 0x10000>, /* GICH */
516 <0x0 0xfff20000 0 0x10000>; /* GICV */
517 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
522 reg = <0x0 0xfee20000 0x0 0x20000>;
526 ppi_cluster0: interrupt-partition-0 {
538 reg = <0x0 0xff100000 0x0 0x100>;
539 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
550 reg = <0x0 0xff110000 0x0 0x1000>;
555 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
557 pinctrl-0 = <&i2c1_xfer>;
559 #size-cells = <0>;
565 reg = <0x0 0xff120000 0x0 0x1000>;
570 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
572 pinctrl-0 = <&i2c2_xfer>;
574 #size-cells = <0>;
580 reg = <0x0 0xff130000 0x0 0x1000>;
585 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
587 pinctrl-0 = <&i2c3_xfer>;
589 #size-cells = <0>;
595 reg = <0x0 0xff140000 0x0 0x1000>;
600 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
602 pinctrl-0 = <&i2c5_xfer>;
604 #size-cells = <0>;
610 reg = <0x0 0xff150000 0x0 0x1000>;
615 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
617 pinctrl-0 = <&i2c6_xfer>;
619 #size-cells = <0>;
625 reg = <0x0 0xff160000 0x0 0x1000>;
630 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
632 pinctrl-0 = <&i2c7_xfer>;
634 #size-cells = <0>;
640 reg = <0x0 0xff180000 0x0 0x100>;
643 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
647 pinctrl-0 = <&uart0_xfer>;
653 reg = <0x0 0xff190000 0x0 0x100>;
656 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
660 pinctrl-0 = <&uart1_xfer>;
666 reg = <0x0 0xff1a0000 0x0 0x100>;
669 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
673 pinctrl-0 = <&uart2c_xfer>;
679 reg = <0x0 0xff1b0000 0x0 0x100>;
682 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
686 pinctrl-0 = <&uart3_xfer>;
692 reg = <0x0 0xff1c0000 0x0 0x1000>;
695 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
699 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
701 #size-cells = <0>;
707 reg = <0x0 0xff1d0000 0x0 0x1000>;
710 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
714 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
716 #size-cells = <0>;
722 reg = <0x0 0xff1e0000 0x0 0x1000>;
725 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
729 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
731 #size-cells = <0>;
737 reg = <0x0 0xff1f0000 0x0 0x1000>;
740 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
744 pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
746 #size-cells = <0>;
752 reg = <0x0 0xff200000 0x0 0x1000>;
755 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
759 pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
762 #size-cells = <0>;
771 thermal-sensors = <&tsadc 0>;
842 reg = <0x0 0xff260000 0x0 0x100>;
843 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
853 pinctrl-0 = <&otp_pin>;
862 reg = <0x0 0xffa58000 0x0 0x20>;
867 reg = <0x0 0xffa5c000 0x0 0x20>;
872 reg = <0x0 0xffa60080 0x0 0x20>;
877 reg = <0x0 0xffa60100 0x0 0x20>;
882 reg = <0x0 0xffa60180 0x0 0x20>;
887 reg = <0x0 0xffa70000 0x0 0x20>;
892 reg = <0x0 0xffa70080 0x0 0x20>;
897 reg = <0x0 0xffa74000 0x0 0x20>;
902 reg = <0x0 0xffa76000 0x0 0x20>;
907 reg = <0x0 0xffa90000 0x0 0x20>;
912 reg = <0x0 0xffa98000 0x0 0x20>;
917 reg = <0x0 0xffaa0000 0x0 0x20>;
922 reg = <0x0 0xffaa0080 0x0 0x20>;
927 reg = <0x0 0xffaa8000 0x0 0x20>;
932 reg = <0x0 0xffaa8080 0x0 0x20>;
937 reg = <0x0 0xffab0000 0x0 0x20>;
942 reg = <0x0 0xffab0080 0x0 0x20>;
947 reg = <0x0 0xffab8000 0x0 0x20>;
952 reg = <0x0 0xffac0000 0x0 0x20>;
957 reg = <0x0 0xffac0080 0x0 0x20>;
962 reg = <0x0 0xffac8000 0x0 0x20>;
967 reg = <0x0 0xffac8080 0x0 0x20>;
972 reg = <0x0 0xffad0000 0x0 0x20>;
977 reg = <0x0 0xffad8080 0x0 0x20>;
982 reg = <0x0 0xffae0000 0x0 0x20>;
987 reg = <0x0 0xff310000 0x0 0x1000>;
1000 #size-cells = <0>;
1083 #size-cells = <0>;
1109 #size-cells = <0>;
1131 reg = <0x0 0xff320000 0x0 0x1000>;
1141 reg = <0x0 0xff350000 0x0 0x1000>;
1144 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
1146 pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
1148 #size-cells = <0>;
1154 reg = <0x0 0xff370000 0x0 0x100>;
1157 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
1161 pinctrl-0 = <&uart4_xfer>;
1167 reg = <0x0 0xff3c0000 0x0 0x1000>;
1172 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
1174 pinctrl-0 = <&i2c0_xfer>;
1176 #size-cells = <0>;
1182 reg = <0x0 0xff3d0000 0x0 0x1000>;
1187 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
1189 pinctrl-0 = <&i2c4_xfer>;
1191 #size-cells = <0>;
1197 reg = <0x0 0xff3e0000 0x0 0x1000>;
1202 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1204 pinctrl-0 = <&i2c8_xfer>;
1206 #size-cells = <0>;
1212 reg = <0x0 0xff420000 0x0 0x10>;
1215 pinctrl-0 = <&pwm0_pin>;
1223 reg = <0x0 0xff420010 0x0 0x10>;
1226 pinctrl-0 = <&pwm1_pin>;
1234 reg = <0x0 0xff420020 0x0 0x10>;
1237 pinctrl-0 = <&pwm2_pin>;
1245 reg = <0x0 0xff420030 0x0 0x10>;
1248 pinctrl-0 = <&pwm3a_pin>;
1256 reg = <0x0 0xff650000 0x0 0x800>;
1257 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
1258 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1268 reg = <0x0 0xff650800 0x0 0x40>;
1269 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
1273 #iommu-cells = <0>;
1279 reg = <0x0 0xff660000 0x0 0x400>;
1280 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1291 reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
1292 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1297 #iommu-cells = <0>;
1302 reg = <0x0 0xff670800 0x0 0x40>;
1303 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
1307 #iommu-cells = <0>;
1313 reg = <0x0 0xff680000 0x0 0x10000>;
1314 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
1324 reg = <0x0 0xff690000 0x0 0x80>;
1332 reg = <0x07 0x10>;
1335 reg = <0x17 0x1>;
1338 reg = <0x18 0x1>;
1341 reg = <0x19 0x1>;
1344 reg = <0x1a 0x1>;
1347 reg = <0x1b 0x1>;
1350 reg = <0x1c 0x1>;
1356 reg = <0x0 0xff750000 0x0 0x1000>;
1366 reg = <0x0 0xff760000 0x0 0x1000>;
1396 reg = <0x0 0xff770000 0x0 0x10000>;
1412 #phy-cells = <0>;
1418 reg = <0xe450 0x10>;
1421 #clock-cells = <0>;
1426 #phy-cells = <0>;
1427 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
1433 #phy-cells = <0>;
1434 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
1435 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
1436 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1445 reg = <0xe460 0x10>;
1448 #clock-cells = <0>;
1453 #phy-cells = <0>;
1454 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
1460 #phy-cells = <0>;
1461 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
1462 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
1463 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1472 reg = <0xf780 0x24>;
1475 #phy-cells = <0>;
1493 reg = <0x0 0xff7c0000 0x0 0x40000>;
1508 #phy-cells = <0>;
1512 #phy-cells = <0>;
1518 reg = <0x0 0xff800000 0x0 0x40000>;
1533 #phy-cells = <0>;
1537 #phy-cells = <0>;
1543 reg = <0x0 0xff848000 0x0 0x100>;
1545 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1550 reg = <0x0 0xff850000 0x0 0x1000>;
1551 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
1558 reg = <0x0 0xff870000 0x0 0x1000>;
1559 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
1565 pinctrl-0 = <&spdif_bus>;
1567 #sound-dai-cells = <0>;
1573 reg = <0x0 0xff880000 0x0 0x1000>;
1575 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
1576 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
1581 pinctrl-0 = <&i2s0_8ch_bus>;
1583 #sound-dai-cells = <0>;
1589 reg = <0x0 0xff890000 0x0 0x1000>;
1590 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
1596 pinctrl-0 = <&i2s1_2ch_bus>;
1598 #sound-dai-cells = <0>;
1604 reg = <0x0 0xff8a0000 0x0 0x1000>;
1605 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
1611 #sound-dai-cells = <0>;
1617 reg = <0x0 0xff8f0000 0x0 0x3efc>;
1618 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1631 #size-cells = <0>;
1633 vopl_out_mipi: endpoint@0 {
1634 reg = <0>;
1662 reg = <0x0 0xff8f3f00 0x0 0x100>;
1663 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1668 #iommu-cells = <0>;
1674 reg = <0x0 0xff900000 0x0 0x3efc>;
1675 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1688 #size-cells = <0>;
1690 vopb_out_edp: endpoint@0 {
1691 reg = <0>;
1719 reg = <0x0 0xff903f00 0x0 0x100>;
1720 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1725 #iommu-cells = <0>;
1731 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1732 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1736 #iommu-cells = <0>;
1743 reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
1744 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1748 #iommu-cells = <0>;
1770 reg = <0x0 0xff940000 0x0 0x20000>;
1771 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
1781 #sound-dai-cells = <0>;
1787 #size-cells = <0>;
1789 hdmi_in_vopb: endpoint@0 {
1790 reg = <0>;
1803 reg = <0x0 0xff960000 0x0 0x8000>;
1804 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
1813 #size-cells = <0>;
1818 #size-cells = <0>;
1820 mipi_in: port@0 {
1821 reg = <0>;
1823 #size-cells = <0>;
1825 mipi_in_vopb: endpoint@0 {
1826 reg = <0>;
1839 reg = <0x0 0xff968000 0x0 0x8000>;
1840 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
1849 #size-cells = <0>;
1854 #size-cells = <0>;
1856 mipi1_in: port@0 {
1857 reg = <0>;
1859 #size-cells = <0>;
1861 mipi1_in_vopb: endpoint@0 {
1862 reg = <0>;
1876 reg = <0x0 0xff970000 0x0 0x8000>;
1877 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
1881 pinctrl-0 = <&edp_hpd>;
1890 #size-cells = <0>;
1891 edp_in: port@0 {
1892 reg = <0>;
1894 #size-cells = <0>;
1896 edp_in_vopb: endpoint@0 {
1897 reg = <0>;
1911 reg = <0x0 0xff9a0000 0x0 0x10000>;
1912 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
1913 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
1914 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
1932 reg = <0x0 0xff720000 0x0 0x100>;
1934 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
1937 #gpio-cells = <0x2>;
1940 #interrupt-cells = <0x2>;
1945 reg = <0x0 0xff730000 0x0 0x100>;
1947 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
1950 #gpio-cells = <0x2>;
1953 #interrupt-cells = <0x2>;
1958 reg = <0x0 0xff780000 0x0 0x100>;
1960 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
1963 #gpio-cells = <0x2>;
1966 #interrupt-cells = <0x2>;
1971 reg = <0x0 0xff788000 0x0 0x100>;
1973 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
1976 #gpio-cells = <0x2>;
1979 #interrupt-cells = <0x2>;
1984 reg = <0x0 0xff790000 0x0 0x100>;
1986 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
1989 #gpio-cells = <0x2>;
1992 #interrupt-cells = <0x2>;
2082 rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
2302 <0 RK_PA3 1 &pcfg_pull_up>;
2307 <0 RK_PA4 1 &pcfg_pull_up>;
2337 <0 RK_PA7 1 &pcfg_pull_up>;
2342 <0 RK_PB0 1 &pcfg_pull_up>;
2352 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
2489 <0 RK_PA0 1 &pcfg_pull_none>;
2499 <0 RK_PB0 3 &pcfg_pull_none>;
2646 <0 RK_PA6 1 &pcfg_pull_none>;