Lines Matching +full:strobe +full:- +full:polarity +full:- +full:high
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 stdout-path = "serial2:115200n8";
23 * - Rails that only connect to the EC (or devices that the EC talks to)
25 * - Rails _are_ included if the rails go to the AP even if the AP
34 * - The EC controls the enable and the EC always enables a rail as
36 * - The rails are actually connected to each other by a jumper and
41 ppvar_sys: ppvar-sys {
42 compatible = "regulator-fixed";
43 regulator-name = "ppvar_sys";
44 regulator-always-on;
45 regulator-boot-on;
48 pp1200_lpddr: pp1200-lpddr {
49 compatible = "regulator-fixed";
50 regulator-name = "pp1200_lpddr";
53 regulator-always-on;
54 regulator-boot-on;
55 regulator-min-microvolt = <1200000>;
56 regulator-max-microvolt = <1200000>;
58 vin-supply = <&ppvar_sys>;
62 compatible = "regulator-fixed";
63 regulator-name = "pp1800";
66 regulator-always-on;
67 regulator-boot-on;
68 regulator-min-microvolt = <1800000>;
69 regulator-max-microvolt = <1800000>;
71 vin-supply = <&ppvar_sys>;
75 compatible = "regulator-fixed";
76 regulator-name = "pp3300";
79 regulator-always-on;
80 regulator-boot-on;
81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <3300000>;
84 vin-supply = <&ppvar_sys>;
88 compatible = "regulator-fixed";
89 regulator-name = "pp5000";
92 regulator-always-on;
93 regulator-boot-on;
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
97 vin-supply = <&ppvar_sys>;
100 ppvar_bigcpu_pwm: ppvar-bigcpu-pwm {
101 compatible = "pwm-regulator";
102 regulator-name = "ppvar_bigcpu_pwm";
105 pwm-supply = <&ppvar_sys>;
106 pwm-dutycycle-range = <100 0>;
107 pwm-dutycycle-unit = <100>;
110 regulator-always-on;
111 regulator-boot-on;
112 regulator-min-microvolt = <800107>;
113 regulator-max-microvolt = <1302232>;
116 ppvar_bigcpu: ppvar-bigcpu {
117 compatible = "vctrl-regulator";
118 regulator-name = "ppvar_bigcpu";
120 regulator-min-microvolt = <800107>;
121 regulator-max-microvolt = <1302232>;
123 ctrl-supply = <&ppvar_bigcpu_pwm>;
124 ctrl-voltage-range = <800107 1302232>;
126 regulator-settling-time-up-us = <322>;
129 ppvar_litcpu_pwm: ppvar-litcpu-pwm {
130 compatible = "pwm-regulator";
131 regulator-name = "ppvar_litcpu_pwm";
134 pwm-supply = <&ppvar_sys>;
135 pwm-dutycycle-range = <100 0>;
136 pwm-dutycycle-unit = <100>;
139 regulator-always-on;
140 regulator-boot-on;
141 regulator-min-microvolt = <797743>;
142 regulator-max-microvolt = <1307837>;
145 ppvar_litcpu: ppvar-litcpu {
146 compatible = "vctrl-regulator";
147 regulator-name = "ppvar_litcpu";
149 regulator-min-microvolt = <797743>;
150 regulator-max-microvolt = <1307837>;
152 ctrl-supply = <&ppvar_litcpu_pwm>;
153 ctrl-voltage-range = <797743 1307837>;
155 regulator-settling-time-up-us = <384>;
158 ppvar_gpu_pwm: ppvar-gpu-pwm {
159 compatible = "pwm-regulator";
160 regulator-name = "ppvar_gpu_pwm";
163 pwm-supply = <&ppvar_sys>;
164 pwm-dutycycle-range = <100 0>;
165 pwm-dutycycle-unit = <100>;
168 regulator-always-on;
169 regulator-boot-on;
170 regulator-min-microvolt = <786384>;
171 regulator-max-microvolt = <1217747>;
174 ppvar_gpu: ppvar-gpu {
175 compatible = "vctrl-regulator";
176 regulator-name = "ppvar_gpu";
178 regulator-min-microvolt = <786384>;
179 regulator-max-microvolt = <1217747>;
181 ctrl-supply = <&ppvar_gpu_pwm>;
182 ctrl-voltage-range = <786384 1217747>;
184 regulator-settling-time-up-us = <390>;
188 pp900_ddrpll: pp900-ap {
192 pp900_pll: pp900-ap {
196 pp900_pmu: pp900-ap {
223 pp3000_sd_slot: pp3000-sd-slot {
224 compatible = "regulator-fixed";
225 regulator-name = "pp3000_sd_slot";
226 pinctrl-names = "default";
227 pinctrl-0 = <&sd_slot_pwr_en>;
229 enable-active-high;
232 vin-supply = <&pp3000>;
236 * Technically, this is a small abuse of 'regulator-gpio'; this
241 ppvar_sd_card_io: ppvar-sd-card-io {
242 compatible = "regulator-gpio";
243 regulator-name = "ppvar_sd_card_io";
244 pinctrl-names = "default";
245 pinctrl-0 = <&sd_io_pwr_en &sd_pwr_1800_sel>;
247 enable-active-high;
248 enable-gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
253 regulator-min-microvolt = <1800000>;
254 regulator-max-microvolt = <3000000>;
258 pp3300_trackpad: pp3300-trackpad {
265 ap_rtc_clk: ap-rtc-clk {
266 compatible = "fixed-clock";
267 clock-frequency = <32768>;
268 clock-output-names = "xin32k";
269 #clock-cells = <0>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&sdmode_en>;
276 sdmode-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
277 sdmode-delay = <2>;
278 #sound-dai-cells = <0>;
283 compatible = "rockchip,rk3399-gru-sound";
311 opp-suspend;
317 opp-suspend;
322 cpu-supply = <&ppvar_litcpu>;
326 cpu-supply = <&ppvar_litcpu>;
330 cpu-supply = <&ppvar_litcpu>;
334 cpu-supply = <&ppvar_litcpu>;
338 cpu-supply = <&ppvar_bigcpu>;
342 cpu-supply = <&ppvar_bigcpu>;
347 assigned-clocks =
358 assigned-clock-rates =
376 mali-supply = <&ppvar_gpu>;
383 clock-frequency = <400000>;
386 i2c-scl-falling-time-ns = <50>;
387 i2c-scl-rising-time-ns = <300>;
393 clock-frequency = <400000>;
396 i2c-scl-falling-time-ns = <50>;
397 i2c-scl-rising-time-ns = <300>;
402 interrupt-parent = <&gpio1>;
405 clock-names = "mclk";
406 dlg,micbias-lvl = <2600>;
407 dlg,mic-amp-in-sel = "diff";
408 pinctrl-names = "default";
409 pinctrl-0 = <&headset_int_l>;
410 VDD-supply = <&pp1800>;
411 VDDMIC-supply = <&pp3300>;
412 VDDIO-supply = <&pp1800>;
415 dlg,adc-1bit-rpt = <1>;
416 dlg,btn-avg = <4>;
417 dlg,btn-cfg = <50>;
418 dlg,mic-det-thr = <500>;
419 dlg,jack-ins-deb = <20>;
420 dlg,jack-det-rate = "32ms_64ms";
421 dlg,jack-rem-deb = <1>;
423 dlg,a-d-btn-thr = <0xa>;
424 dlg,d-b-btn-thr = <0x16>;
425 dlg,b-c-btn-thr = <0x21>;
426 dlg,c-mic-btn-thr = <0x3E>;
442 audio-supply = <&pp1800_audio>; /* APIO5_VDD; 3d 4a */
443 bt656-supply = <&pp1800_ap_io>; /* APIO2_VDD; 2a 2b */
444 gpio1830-supply = <&pp3000_ap>; /* APIO4_VDD; 4c 4d */
445 sdmmc-supply = <&ppvar_sd_card_io>; /* SDMMC0_VDD; 4b */
451 ep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
452 pinctrl-names = "default";
453 pinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>;
454 vpcie3v3-supply = <&pp3300_wifi_bt>;
455 vpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */
456 vpcie0v9-supply = <&pp900_pcie>;
460 #address-cells = <3>;
461 #size-cells = <2>;
473 pmu1830-supply = <&pp1800_pmu>; /* PMUIO2_VDD */
498 assigned-clock-rates = <150000000>;
500 bus-width = <8>;
501 mmc-hs400-1_8v;
502 mmc-hs400-enhanced-strobe;
503 non-removable;
512 * hooked to ground. Because we specified "cd-gpios" below dw_mmc
518 pinctrl-names = "default";
519 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin
522 bus-width = <4>;
523 cap-mmc-highspeed;
524 cap-sd-highspeed;
525 cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
526 disable-wp;
527 sd-uhs-sdr12;
528 sd-uhs-sdr25;
529 sd-uhs-sdr50;
530 sd-uhs-sdr104;
531 vmmc-supply = <&pp3000_sd_slot>;
532 vqmmc-supply = <&ppvar_sd_card_io>;
538 pinctrl-names = "default", "sleep";
539 pinctrl-1 = <&spi1_sleep>;
542 compatible = "jedec,spi-nor";
546 spi-max-frequency = <10000000>;
558 compatible = "google,cros-ec-spi";
560 interrupt-parent = <&gpio0>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&ec_ap_int_l>;
564 spi-max-frequency = <3000000>;
566 i2c_tunnel: i2c-tunnel {
567 compatible = "google,cros-ec-i2c-tunnel";
568 google,remote-bus = <4>;
569 #address-cells = <1>;
570 #size-cells = <0>;
574 compatible = "google,extcon-usbc-cros-ec";
575 google,usb-port-id = <0>;
583 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
584 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
646 #include <arm/cros-ec-keyboard.dtsi>
647 #include <arm/cros-ec-sbs.dtsi>
656 pinctrl-names = "default";
657 pinctrl-0 = <
658 &ap_pwroff /* AP will auto-assert this when in S3 */
662 pcfg_output_low: pcfg-output-low {
663 output-low;
666 pcfg_output_high: pcfg-output-high {
667 output-high;
670 pcfg_pull_none_8ma: pcfg-pull-none-8ma {
671 bias-disable;
672 drive-strength = <8>;
675 backlight-enable {
676 bl_en: bl-en {
681 cros-ec {
682 ec_ap_int_l: ec-ap-int-l {
687 discrete-regulators {
688 sd_io_pwr_en: sd-io-pwr-en {
693 sd_pwr_1800_sel: sd-pwr-1800-sel {
698 sd_slot_pwr_en: sd-slot-pwr-en {
706 headset_int_l: headset-int-l {
710 mic_int: mic-int {
716 sdmode_en: sdmode-en {
722 pcie_clkreqn_cpm: pci-clkreqn-cpm {
726 * de-assert it along and make ClockPM(CPM) work.
737 sdmmc_bus4: sdmmc-bus4 {
745 sdmmc_clk: sdmmc-clk {
750 sdmmc_cmd: sdmmc-cmd {
764 sdmmc_cd: sdmmc-cd {
770 sdmmc_cd_pin: sdmmc-cd-pin {
776 spi1_sleep: spi1-sleep {
789 touch_int_l: touch-int-l {
793 touch_reset_l: touch-reset-l {
799 ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
803 trackpad_int_l: trackpad-int-l {
809 wlan_module_reset_l: wlan-module-reset-l {
813 bt_host_wake_l: bt-host-wake-l {
819 write-protect {
820 ap_fw_wp: ap-fw-wp {