Lines Matching +full:rk3288 +full:- +full:vpu
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
35 #address-cells = <2>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a53";
43 #cooling-cells = <2>;
44 cpu-idle-states = <&CPU_SLEEP>;
45 dynamic-power-coefficient = <120>;
46 enable-method = "psci";
47 next-level-cache = <&l2>;
48 operating-points-v2 = <&cpu0_opp_table>;
53 compatible = "arm,cortex-a53";
56 #cooling-cells = <2>;
57 cpu-idle-states = <&CPU_SLEEP>;
58 dynamic-power-coefficient = <120>;
59 enable-method = "psci";
60 next-level-cache = <&l2>;
61 operating-points-v2 = <&cpu0_opp_table>;
66 compatible = "arm,cortex-a53";
69 #cooling-cells = <2>;
70 cpu-idle-states = <&CPU_SLEEP>;
71 dynamic-power-coefficient = <120>;
72 enable-method = "psci";
73 next-level-cache = <&l2>;
74 operating-points-v2 = <&cpu0_opp_table>;
79 compatible = "arm,cortex-a53";
82 #cooling-cells = <2>;
83 cpu-idle-states = <&CPU_SLEEP>;
84 dynamic-power-coefficient = <120>;
85 enable-method = "psci";
86 next-level-cache = <&l2>;
87 operating-points-v2 = <&cpu0_opp_table>;
90 idle-states {
91 entry-method = "psci";
93 CPU_SLEEP: cpu-sleep {
94 compatible = "arm,idle-state";
95 local-timer-stop;
96 arm,psci-suspend-param = <0x0010000>;
97 entry-latency-us = <120>;
98 exit-latency-us = <250>;
99 min-residency-us = <900>;
103 l2: l2-cache0 {
109 compatible = "operating-points-v2";
110 opp-shared;
112 opp-408000000 {
113 opp-hz = /bits/ 64 <408000000>;
114 opp-microvolt = <950000>;
115 clock-latency-ns = <40000>;
116 opp-suspend;
118 opp-600000000 {
119 opp-hz = /bits/ 64 <600000000>;
120 opp-microvolt = <950000>;
121 clock-latency-ns = <40000>;
123 opp-816000000 {
124 opp-hz = /bits/ 64 <816000000>;
125 opp-microvolt = <1000000>;
126 clock-latency-ns = <40000>;
128 opp-1008000000 {
129 opp-hz = /bits/ 64 <1008000000>;
130 opp-microvolt = <1100000>;
131 clock-latency-ns = <40000>;
133 opp-1200000000 {
134 opp-hz = /bits/ 64 <1200000000>;
135 opp-microvolt = <1225000>;
136 clock-latency-ns = <40000>;
138 opp-1296000000 {
139 opp-hz = /bits/ 64 <1296000000>;
140 opp-microvolt = <1300000>;
141 clock-latency-ns = <40000>;
146 compatible = "simple-bus";
147 #address-cells = <2>;
148 #size-cells = <2>;
156 arm,pl330-periph-burst;
158 clock-names = "apb_pclk";
159 #dma-cells = <1>;
163 analog_sound: analog-sound {
164 compatible = "simple-audio-card";
165 simple-audio-card,format = "i2s";
166 simple-audio-card,mclk-fs = <256>;
167 simple-audio-card,name = "Analog";
170 simple-audio-card,cpu {
171 sound-dai = <&i2s1>;
174 simple-audio-card,codec {
175 sound-dai = <&codec>;
179 arm-pmu {
180 compatible = "arm,cortex-a53-pmu";
185 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
188 display_subsystem: display-subsystem {
189 compatible = "rockchip,display-subsystem";
193 hdmi_sound: hdmi-sound {
194 compatible = "simple-audio-card";
195 simple-audio-card,format = "i2s";
196 simple-audio-card,mclk-fs = <128>;
197 simple-audio-card,name = "HDMI";
200 simple-audio-card,cpu {
201 sound-dai = <&i2s0>;
204 simple-audio-card,codec {
205 sound-dai = <&hdmi>;
210 compatible = "arm,psci-1.0", "arm,psci-0.2";
215 compatible = "arm,armv8-timer";
223 compatible = "fixed-clock";
224 #clock-cells = <0>;
225 clock-frequency = <24000000>;
226 clock-output-names = "xin24m";
230 compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
234 clock-names = "i2s_clk", "i2s_hclk";
236 dma-names = "tx", "rx";
237 #sound-dai-cells = <0>;
242 compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
246 clock-names = "i2s_clk", "i2s_hclk";
248 dma-names = "tx", "rx";
249 #sound-dai-cells = <0>;
254 compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
258 clock-names = "i2s_clk", "i2s_hclk";
260 dma-names = "tx", "rx";
261 #sound-dai-cells = <0>;
266 compatible = "rockchip,rk3328-spdif";
270 clock-names = "mclk", "hclk";
272 dma-names = "tx";
273 pinctrl-names = "default";
274 pinctrl-0 = <&spdifm2_tx>;
275 #sound-dai-cells = <0>;
283 clock-names = "pdm_clk", "pdm_hclk";
285 dma-names = "rx";
286 pinctrl-names = "default", "sleep";
287 pinctrl-0 = <&pdmm0_clk
292 pinctrl-1 = <&pdmm0_clk_sleep
301 compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
304 io_domains: io-domains {
305 compatible = "rockchip,rk3328-io-voltage-domain";
309 grf_gpio: grf-gpio {
310 compatible = "rockchip,rk3328-grf-gpio";
311 gpio-controller;
312 #gpio-cells = <2>;
315 power: power-controller {
316 compatible = "rockchip,rk3328-power-controller";
317 #power-domain-cells = <1>;
318 #address-cells = <1>;
319 #size-cells = <0>;
333 reboot-mode {
334 compatible = "syscon-reboot-mode";
336 mode-normal = <BOOT_NORMAL>;
337 mode-recovery = <BOOT_RECOVERY>;
338 mode-bootloader = <BOOT_FASTBOOT>;
339 mode-loader = <BOOT_BL_DOWNLOAD>;
344 compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
348 clock-names = "baudclk", "apb_pclk";
350 dma-names = "tx", "rx";
351 pinctrl-names = "default";
352 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
353 reg-io-width = <4>;
354 reg-shift = <2>;
359 compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
363 clock-names = "baudclk", "apb_pclk";
365 dma-names = "tx", "rx";
366 pinctrl-names = "default";
367 pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
368 reg-io-width = <4>;
369 reg-shift = <2>;
374 compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
378 clock-names = "baudclk", "apb_pclk";
380 dma-names = "tx", "rx";
381 pinctrl-names = "default";
382 pinctrl-0 = <&uart2m1_xfer>;
383 reg-io-width = <4>;
384 reg-shift = <2>;
389 compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
392 #address-cells = <1>;
393 #size-cells = <0>;
395 clock-names = "i2c", "pclk";
396 pinctrl-names = "default";
397 pinctrl-0 = <&i2c0_xfer>;
402 compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
405 #address-cells = <1>;
406 #size-cells = <0>;
408 clock-names = "i2c", "pclk";
409 pinctrl-names = "default";
410 pinctrl-0 = <&i2c1_xfer>;
415 compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
418 #address-cells = <1>;
419 #size-cells = <0>;
421 clock-names = "i2c", "pclk";
422 pinctrl-names = "default";
423 pinctrl-0 = <&i2c2_xfer>;
428 compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
431 #address-cells = <1>;
432 #size-cells = <0>;
434 clock-names = "i2c", "pclk";
435 pinctrl-names = "default";
436 pinctrl-0 = <&i2c3_xfer>;
441 compatible = "rockchip,rk3328-spi", "rockchip,rk3066-spi";
444 #address-cells = <1>;
445 #size-cells = <0>;
447 clock-names = "spiclk", "apb_pclk";
449 dma-names = "tx", "rx";
450 pinctrl-names = "default";
451 pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>;
456 compatible = "snps,dw-wdt";
463 compatible = "rockchip,rk3328-pwm";
466 clock-names = "pwm", "pclk";
467 pinctrl-names = "default";
468 pinctrl-0 = <&pwm0_pin>;
469 #pwm-cells = <3>;
474 compatible = "rockchip,rk3328-pwm";
477 clock-names = "pwm", "pclk";
478 pinctrl-names = "default";
479 pinctrl-0 = <&pwm1_pin>;
480 #pwm-cells = <3>;
485 compatible = "rockchip,rk3328-pwm";
488 clock-names = "pwm", "pclk";
489 pinctrl-names = "default";
490 pinctrl-0 = <&pwm2_pin>;
491 #pwm-cells = <3>;
496 compatible = "rockchip,rk3328-pwm";
500 clock-names = "pwm", "pclk";
501 pinctrl-names = "default";
502 pinctrl-0 = <&pwmir_pin>;
503 #pwm-cells = <3>;
507 thermal-zones {
508 soc_thermal: soc-thermal {
509 polling-delay-passive = <20>;
510 polling-delay = <1000>;
511 sustainable-power = <1000>;
513 thermal-sensors = <&tsadc 0>;
516 threshold: trip-point0 {
521 target: trip-point1 {
526 soc_crit: soc-crit {
533 cooling-maps {
536 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
548 compatible = "rockchip,rk3328-tsadc";
551 assigned-clocks = <&cru SCLK_TSADC>;
552 assigned-clock-rates = <50000>;
554 clock-names = "tsadc", "apb_pclk";
555 pinctrl-names = "init", "default", "sleep";
556 pinctrl-0 = <&otp_pin>;
557 pinctrl-1 = <&otp_out>;
558 pinctrl-2 = <&otp_pin>;
560 reset-names = "tsadc-apb";
562 rockchip,hw-tshut-temp = <100000>;
563 #thermal-sensor-cells = <1>;
568 compatible = "rockchip,rk3328-efuse";
570 #address-cells = <1>;
571 #size-cells = <1>;
573 clock-names = "pclk_efuse";
574 rockchip,efuse-size = <0x20>;
580 cpu_leakage: cpu-leakage@17 {
583 logic_leakage: logic-leakage@19 {
586 efuse_cpu_version: cpu-version@1a {
593 compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
596 #io-channel-cells = <1>;
598 clock-names = "saradc", "apb_pclk";
600 reset-names = "saradc-apb";
605 compatible = "rockchip,rk3328-mali", "arm,mali-450";
614 interrupt-names = "gp",
622 clock-names = "bus", "core";
630 interrupt-names = "h265e_mmu";
632 clock-names = "aclk", "iface";
633 #iommu-cells = <0>;
641 interrupt-names = "vepu_mmu";
643 clock-names = "aclk", "iface";
644 #iommu-cells = <0>;
648 vpu: video-codec@ff350000 { label
649 compatible = "rockchip,rk3328-vpu";
652 interrupt-names = "vdpu";
654 clock-names = "aclk", "hclk";
656 power-domains = <&power RK3328_PD_VPU>;
663 interrupt-names = "vpu_mmu";
665 clock-names = "aclk", "iface";
666 #iommu-cells = <0>;
667 power-domains = <&power RK3328_PD_VPU>;
674 interrupt-names = "rkvdec_mmu";
676 clock-names = "aclk", "iface";
677 #iommu-cells = <0>;
682 compatible = "rockchip,rk3328-vop";
686 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
688 reset-names = "axi", "ahb", "dclk";
693 #address-cells = <1>;
694 #size-cells = <0>;
698 remote-endpoint = <&hdmi_in_vop>;
707 interrupt-names = "vop_mmu";
709 clock-names = "aclk", "iface";
710 #iommu-cells = <0>;
715 compatible = "rockchip,rk3328-dw-hdmi";
717 reg-io-width = <4>;
723 clock-names = "iahb",
727 phy-names = "hdmi";
728 pinctrl-names = "default";
729 pinctrl-0 = <&hdmi_cec &hdmii2c_xfer &hdmi_hpd>;
731 #sound-dai-cells = <0>;
737 remote-endpoint = <&vop_out_hdmi>;
744 compatible = "rockchip,rk3328-codec";
747 clock-names = "pclk", "mclk";
749 #sound-dai-cells = <0>;
754 compatible = "rockchip,rk3328-hdmi-phy";
758 clock-names = "sysclk", "refoclk", "refpclk";
759 clock-output-names = "hdmi_phy";
760 #clock-cells = <0>;
761 nvmem-cells = <&efuse_cpu_version>;
762 nvmem-cell-names = "cpu-version";
763 #phy-cells = <0>;
767 cru: clock-controller@ff440000 {
768 compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
771 #clock-cells = <1>;
772 #reset-cells = <1>;
773 assigned-clocks =
796 assigned-clock-parents =
800 assigned-clock-rates =
820 compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
821 "simple-mfd";
823 #address-cells = <1>;
824 #size-cells = <1>;
826 u2phy: usb2-phy@100 {
827 compatible = "rockchip,rk3328-usb2phy";
830 clock-names = "phyclk";
831 clock-output-names = "usb480m_phy";
832 #clock-cells = <0>;
833 assigned-clocks = <&cru USB480M>;
834 assigned-clock-parents = <&u2phy>;
837 u2phy_otg: otg-port {
838 #phy-cells = <0>;
842 interrupt-names = "otg-bvalid", "otg-id",
847 u2phy_host: host-port {
848 #phy-cells = <0>;
850 interrupt-names = "linestate";
857 compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
862 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
863 fifo-depth = <0x100>;
864 max-frequency = <150000000>;
869 compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
874 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
875 fifo-depth = <0x100>;
876 max-frequency = <150000000>;
881 compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
886 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
887 fifo-depth = <0x100>;
888 max-frequency = <150000000>;
893 compatible = "rockchip,rk3328-gmac";
896 interrupt-names = "macirq";
901 clock-names = "stmmaceth", "mac_clk_rx",
906 reset-names = "stmmaceth";
913 compatible = "rockchip,rk3328-gmac";
917 interrupt-names = "macirq";
922 clock-names = "stmmaceth", "mac_clk_rx",
927 reset-names = "stmmaceth", "mac-phy";
928 phy-mode = "rmii";
929 phy-handle = <&phy>;
934 compatible = "snps,dwmac-mdio";
935 #address-cells = <1>;
936 #size-cells = <0>;
938 phy: ethernet-phy@0 {
939 compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
943 pinctrl-names = "default";
944 pinctrl-0 = <&fephyled_rxm1 &fephyled_linkm1>;
945 phy-is-integrated;
951 compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
956 clock-names = "otg";
958 g-np-tx-fifo-size = <16>;
959 g-rx-fifo-size = <280>;
960 g-tx-fifo-size = <256 128 128 64 32 16>;
962 phy-names = "usb2-phy";
967 compatible = "generic-ehci";
972 phy-names = "usb";
977 compatible = "generic-ohci";
982 phy-names = "usb";
986 gic: interrupt-controller@ff811000 {
987 compatible = "arm,gic-400";
988 #interrupt-cells = <3>;
989 #address-cells = <0>;
990 interrupt-controller;
1000 compatible = "rockchip,rk3328-pinctrl";
1002 #address-cells = <2>;
1003 #size-cells = <2>;
1007 compatible = "rockchip,gpio-bank";
1012 gpio-controller;
1013 #gpio-cells = <2>;
1015 interrupt-controller;
1016 #interrupt-cells = <2>;
1020 compatible = "rockchip,gpio-bank";
1025 gpio-controller;
1026 #gpio-cells = <2>;
1028 interrupt-controller;
1029 #interrupt-cells = <2>;
1033 compatible = "rockchip,gpio-bank";
1038 gpio-controller;
1039 #gpio-cells = <2>;
1041 interrupt-controller;
1042 #interrupt-cells = <2>;
1046 compatible = "rockchip,gpio-bank";
1051 gpio-controller;
1052 #gpio-cells = <2>;
1054 interrupt-controller;
1055 #interrupt-cells = <2>;
1058 pcfg_pull_up: pcfg-pull-up {
1059 bias-pull-up;
1062 pcfg_pull_down: pcfg-pull-down {
1063 bias-pull-down;
1066 pcfg_pull_none: pcfg-pull-none {
1067 bias-disable;
1070 pcfg_pull_none_2ma: pcfg-pull-none-2ma {
1071 bias-disable;
1072 drive-strength = <2>;
1075 pcfg_pull_up_2ma: pcfg-pull-up-2ma {
1076 bias-pull-up;
1077 drive-strength = <2>;
1080 pcfg_pull_up_4ma: pcfg-pull-up-4ma {
1081 bias-pull-up;
1082 drive-strength = <4>;
1085 pcfg_pull_none_4ma: pcfg-pull-none-4ma {
1086 bias-disable;
1087 drive-strength = <4>;
1090 pcfg_pull_down_4ma: pcfg-pull-down-4ma {
1091 bias-pull-down;
1092 drive-strength = <4>;
1095 pcfg_pull_none_8ma: pcfg-pull-none-8ma {
1096 bias-disable;
1097 drive-strength = <8>;
1100 pcfg_pull_up_8ma: pcfg-pull-up-8ma {
1101 bias-pull-up;
1102 drive-strength = <8>;
1105 pcfg_pull_none_12ma: pcfg-pull-none-12ma {
1106 bias-disable;
1107 drive-strength = <12>;
1110 pcfg_pull_up_12ma: pcfg-pull-up-12ma {
1111 bias-pull-up;
1112 drive-strength = <12>;
1115 pcfg_output_high: pcfg-output-high {
1116 output-high;
1119 pcfg_output_low: pcfg-output-low {
1120 output-low;
1123 pcfg_input_high: pcfg-input-high {
1124 bias-pull-up;
1125 input-enable;
1128 pcfg_input: pcfg-input {
1129 input-enable;
1133 i2c0_xfer: i2c0-xfer {
1140 i2c1_xfer: i2c1-xfer {
1147 i2c2_xfer: i2c2-xfer {
1154 i2c3_xfer: i2c3-xfer {
1158 i2c3_pins: i2c3-pins {
1166 hdmii2c_xfer: hdmii2c-xfer {
1172 pdm-0 {
1173 pdmm0_clk: pdmm0-clk {
1177 pdmm0_fsync: pdmm0-fsync {
1181 pdmm0_sdi0: pdmm0-sdi0 {
1185 pdmm0_sdi1: pdmm0-sdi1 {
1189 pdmm0_sdi2: pdmm0-sdi2 {
1193 pdmm0_sdi3: pdmm0-sdi3 {
1197 pdmm0_clk_sleep: pdmm0-clk-sleep {
1202 pdmm0_sdi0_sleep: pdmm0-sdi0-sleep {
1207 pdmm0_sdi1_sleep: pdmm0-sdi1-sleep {
1212 pdmm0_sdi2_sleep: pdmm0-sdi2-sleep {
1217 pdmm0_sdi3_sleep: pdmm0-sdi3-sleep {
1222 pdmm0_fsync_sleep: pdmm0-fsync-sleep {
1229 otp_pin: otp-pin {
1233 otp_out: otp-out {
1239 uart0_xfer: uart0-xfer {
1244 uart0_cts: uart0-cts {
1248 uart0_rts: uart0-rts {
1252 uart0_rts_pin: uart0-rts-pin {
1258 uart1_xfer: uart1-xfer {
1263 uart1_cts: uart1-cts {
1267 uart1_rts: uart1-rts {
1271 uart1_rts_pin: uart1-rts-pin {
1276 uart2-0 {
1277 uart2m0_xfer: uart2m0-xfer {
1283 uart2-1 {
1284 uart2m1_xfer: uart2m1-xfer {
1290 spi0-0 {
1291 spi0m0_clk: spi0m0-clk {
1295 spi0m0_cs0: spi0m0-cs0 {
1299 spi0m0_tx: spi0m0-tx {
1303 spi0m0_rx: spi0m0-rx {
1307 spi0m0_cs1: spi0m0-cs1 {
1312 spi0-1 {
1313 spi0m1_clk: spi0m1-clk {
1317 spi0m1_cs0: spi0m1-cs0 {
1321 spi0m1_tx: spi0m1-tx {
1325 spi0m1_rx: spi0m1-rx {
1329 spi0m1_cs1: spi0m1-cs1 {
1334 spi0-2 {
1335 spi0m2_clk: spi0m2-clk {
1339 spi0m2_cs0: spi0m2-cs0 {
1343 spi0m2_tx: spi0m2-tx {
1347 spi0m2_rx: spi0m2-rx {
1353 i2s1_mclk: i2s1-mclk {
1357 i2s1_sclk: i2s1-sclk {
1361 i2s1_lrckrx: i2s1-lrckrx {
1365 i2s1_lrcktx: i2s1-lrcktx {
1369 i2s1_sdi: i2s1-sdi {
1373 i2s1_sdo: i2s1-sdo {
1377 i2s1_sdio1: i2s1-sdio1 {
1381 i2s1_sdio2: i2s1-sdio2 {
1385 i2s1_sdio3: i2s1-sdio3 {
1389 i2s1_sleep: i2s1-sleep {
1403 i2s2-0 {
1404 i2s2m0_mclk: i2s2m0-mclk {
1408 i2s2m0_sclk: i2s2m0-sclk {
1412 i2s2m0_lrckrx: i2s2m0-lrckrx {
1416 i2s2m0_lrcktx: i2s2m0-lrcktx {
1420 i2s2m0_sdi: i2s2m0-sdi {
1424 i2s2m0_sdo: i2s2m0-sdo {
1428 i2s2m0_sleep: i2s2m0-sleep {
1439 i2s2-1 {
1440 i2s2m1_mclk: i2s2m1-mclk {
1444 i2s2m1_sclk: i2s2m1-sclk {
1448 i2s2m1_lrckrx: i2sm1-lrckrx {
1452 i2s2m1_lrcktx: i2s2m1-lrcktx {
1456 i2s2m1_sdi: i2s2m1-sdi {
1460 i2s2m1_sdo: i2s2m1-sdo {
1464 i2s2m1_sleep: i2s2m1-sleep {
1474 spdif-0 {
1475 spdifm0_tx: spdifm0-tx {
1480 spdif-1 {
1481 spdifm1_tx: spdifm1-tx {
1486 spdif-2 {
1487 spdifm2_tx: spdifm2-tx {
1492 sdmmc0-0 {
1493 sdmmc0m0_pwren: sdmmc0m0-pwren {
1497 sdmmc0m0_pin: sdmmc0m0-pin {
1502 sdmmc0-1 {
1503 sdmmc0m1_pwren: sdmmc0m1-pwren {
1507 sdmmc0m1_pin: sdmmc0m1-pin {
1513 sdmmc0_clk: sdmmc0-clk {
1517 sdmmc0_cmd: sdmmc0-cmd {
1521 sdmmc0_dectn: sdmmc0-dectn {
1525 sdmmc0_wrprt: sdmmc0-wrprt {
1529 sdmmc0_bus1: sdmmc0-bus1 {
1533 sdmmc0_bus4: sdmmc0-bus4 {
1540 sdmmc0_pins: sdmmc0-pins {
1554 sdmmc0ext_clk: sdmmc0ext-clk {
1558 sdmmc0ext_cmd: sdmmc0ext-cmd {
1562 sdmmc0ext_wrprt: sdmmc0ext-wrprt {
1566 sdmmc0ext_dectn: sdmmc0ext-dectn {
1570 sdmmc0ext_bus1: sdmmc0ext-bus1 {
1574 sdmmc0ext_bus4: sdmmc0ext-bus4 {
1582 sdmmc0ext_pins: sdmmc0ext-pins {
1596 sdmmc1_clk: sdmmc1-clk {
1600 sdmmc1_cmd: sdmmc1-cmd {
1604 sdmmc1_pwren: sdmmc1-pwren {
1608 sdmmc1_wrprt: sdmmc1-wrprt {
1612 sdmmc1_dectn: sdmmc1-dectn {
1616 sdmmc1_bus1: sdmmc1-bus1 {
1620 sdmmc1_bus4: sdmmc1-bus4 {
1627 sdmmc1_pins: sdmmc1-pins {
1642 emmc_clk: emmc-clk {
1646 emmc_cmd: emmc-cmd {
1650 emmc_pwren: emmc-pwren {
1654 emmc_rstnout: emmc-rstnout {
1658 emmc_bus1: emmc-bus1 {
1662 emmc_bus4: emmc-bus4 {
1670 emmc_bus8: emmc-bus8 {
1684 pwm0_pin: pwm0-pin {
1690 pwm1_pin: pwm1-pin {
1696 pwm2_pin: pwm2-pin {
1702 pwmir_pin: pwmir-pin {
1707 gmac-1 {
1708 rgmiim1_pins: rgmiim1-pins {
1757 rmiim1_pins: rmiim1-pins {
1796 fephyled_speed10: fephyled-speed10 {
1800 fephyled_duplex: fephyled-duplex {
1804 fephyled_rxm1: fephyled-rxm1 {
1808 fephyled_txm1: fephyled-txm1 {
1812 fephyled_linkm1: fephyled-linkm1 {
1818 tsadc_int: tsadc-int {
1821 tsadc_pin: tsadc-pin {
1827 hdmi_cec: hdmi-cec {
1831 hdmi_hpd: hdmi-hpd {
1836 cif-0 {
1837 dvp_d2d9_m0:dvp-d2d9-m0 {
1866 cif-1 {
1867 dvp_d2d9_m1:dvp-d2d9-m1 {