Lines Matching +full:0 +full:xfeb90100
21 #clock-cells = <0>;
22 clock-frequency = <0>;
27 #size-cells = <0>;
29 a53_0: cpu@0 {
31 reg = <0x0>;
48 #clock-cells = <0>;
50 clock-frequency = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
79 reg = <0 0xe6020000 0 0x0c>;
89 reg = <0 0xe6050000 0 0x50>;
93 gpio-ranges = <&pfc 0 0 9>;
104 reg = <0 0xe6051000 0 0x50>;
108 gpio-ranges = <&pfc 0 32 32>;
119 reg = <0 0xe6052000 0 0x50>;
123 gpio-ranges = <&pfc 0 64 32>;
134 reg = <0 0xe6053000 0 0x50>;
138 gpio-ranges = <&pfc 0 96 10>;
149 reg = <0 0xe6054000 0 0x50>;
153 gpio-ranges = <&pfc 0 128 32>;
164 reg = <0 0xe6055000 0 0x50>;
168 gpio-ranges = <&pfc 0 160 21>;
179 reg = <0 0xe6055400 0 0x50>;
183 gpio-ranges = <&pfc 0 192 14>;
193 reg = <0 0xe6060000 0 0x508>;
198 reg = <0 0xe6150000 0 0x1000>;
202 #power-domain-cells = <0>;
208 reg = <0 0xe6160000 0 0x0200>;
213 reg = <0 0xe6180000 0 0x0400>;
219 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
226 #thermal-sensor-cells = <0>;
233 reg = <0 0xe61c0000 0 0x200>;
234 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
247 #size-cells = <0>;
250 reg = <0 0xe6500000 0 0x40>;
255 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
256 <&dmac2 0x91>, <&dmac2 0x90>;
264 #size-cells = <0>;
267 reg = <0 0xe6508000 0 0x40>;
272 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
273 <&dmac2 0x93>, <&dmac2 0x92>;
281 #size-cells = <0>;
284 reg = <0 0xe6510000 0 0x40>;
289 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
290 <&dmac2 0x95>, <&dmac2 0x94>;
298 #size-cells = <0>;
301 reg = <0 0xe66d0000 0 0x40>;
306 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
316 reg = <0 0xe6540000 0 0x60>;
322 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
323 <&dmac2 0x31>, <&dmac2 0x30>;
334 reg = <0 0xe66a0000 0 0x60>;
340 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
350 reg = <0 0xe6590000 0 0x200>;
353 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
354 <&usb_dmac1 0>, <&usb_dmac1 1>;
367 reg = <0 0xe65a0000 0 0x100>;
381 reg = <0 0xe65b0000 0 0x100>;
395 reg = <0x0 0xe6601000 0 0x1000>;
404 reg = <0 0xe66c0000 0 0x8000>;
429 reg = <0 0xe6700000 0 0x10000>;
448 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
457 reg = <0 0xe7300000 0 0x10000>;
476 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
485 reg = <0 0xe7310000 0 0x10000>;
512 reg = <0 0xe6740000 0 0x1000>;
513 renesas,ipmmu-main = <&ipmmu_mm 0>;
520 reg = <0 0xe7740000 0 0x1000>;
528 reg = <0 0xe6570000 0 0x1000>;
536 reg = <0 0xe67b0000 0 0x1000>;
545 reg = <0 0xec670000 0 0x1000>;
553 reg = <0 0xfd800000 0 0x1000>;
561 reg = <0 0xffc80000 0 0x1000>;
569 reg = <0 0xfe6b0000 0 0x1000>;
577 reg = <0 0xfebd0000 0 0x1000>;
585 reg = <0 0xfe990000 0 0x1000>;
594 reg = <0 0xe6800000 0 0x800>;
633 #size-cells = <0>;
640 reg = <0 0xe6c30000 0 0x1000>;
656 reg = <0 0xe6c38000 0 0x1000>;
671 reg = <0 0xe6e30000 0 0x8>;
681 reg = <0 0xe6e31000 0 0x8>;
691 reg = <0 0xe6e32000 0 0x8>;
701 reg = <0 0xe6e33000 0 0x8>;
712 reg = <0 0xe6e60000 0 64>;
718 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
719 <&dmac2 0x51>, <&dmac2 0x50>;
729 reg = <0 0xe6e68000 0 64>;
735 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
736 <&dmac2 0x53>, <&dmac2 0x52>;
746 reg = <0 0xe6e88000 0 64>;
752 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
753 <&dmac2 0x13>, <&dmac2 0x12>;
763 reg = <0 0xe6c50000 0 64>;
769 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
779 reg = <0 0xe6c40000 0 64>;
785 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
795 reg = <0 0xe6f30000 0 64>;
801 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
802 <&dmac2 0x5b>, <&dmac2 0x5a>;
812 reg = <0 0xe6e90000 0 0x64>;
815 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
816 <&dmac2 0x41>, <&dmac2 0x40>;
821 #size-cells = <0>;
828 reg = <0 0xe6ea0000 0 0x64>;
831 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
832 <&dmac2 0x43>, <&dmac2 0x42>;
837 #size-cells = <0>;
844 reg = <0 0xe6c00000 0 0x64>;
847 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
852 #size-cells = <0>;
859 reg = <0 0xe6c10000 0 0x64>;
862 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
867 #size-cells = <0>;
873 reg = <0 0xe6ef4000 0 0x1000>;
884 reg = <0 0xee080000 0 0x100>;
896 reg = <0 0xee080100 0 0x100>;
910 reg = <0 0xee080200 0 0x700>;
922 reg = <0 0xee140000 0 0x2000>;
935 #address-cells = <0>;
937 reg = <0x0 0xf1010000 0 0x1000>,
938 <0x0 0xf1020000 0 0x20000>,
939 <0x0 0xf1040000 0 0x20000>,
940 <0x0 0xf1060000 0 0x20000>;
951 reg = <0 0xfe960000 0 0x8000>;
961 reg = <0 0xfea20000 0 0x5000>;
971 reg = <0 0xfea28000 0 0x5000>;
981 reg = <0 0xfe96f000 0 0x200>;
990 reg = <0 0xfea27000 0 0x200>;
999 reg = <0 0xfea2f000 0 0x200>;
1009 reg = <0 0xfea40000 0 0x1000>;
1018 reg = <0 0xfea50000 0 0x1000>;
1026 reg = <0 0xfeb00000 0 0x40000>;
1030 clock-names = "du.0", "du.1";
1032 reset-names = "du.0";
1035 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1041 #size-cells = <0>;
1043 port@0 {
1044 reg = <0>;
1067 reg = <0 0xfeb90000 0 0x20>;
1077 #size-cells = <0>;
1079 port@0 {
1080 reg = <0>;
1096 reg = <0 0xfeb90100 0 0x20>;
1104 #size-cells = <0>;
1106 port@0 {
1107 reg = <0>;
1123 reg = <0 0xfff00044 0 4>;