Lines Matching refs:cpg
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
93 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
105 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
174 clocks = <&cpg CPG_MOD 402>;
176 resets = <&cpg 402>;
190 clocks = <&cpg CPG_MOD 912>;
192 resets = <&cpg 912>;
205 clocks = <&cpg CPG_MOD 911>;
207 resets = <&cpg 911>;
220 clocks = <&cpg CPG_MOD 910>;
222 resets = <&cpg 910>;
235 clocks = <&cpg CPG_MOD 909>;
237 resets = <&cpg 909>;
250 clocks = <&cpg CPG_MOD 908>;
252 resets = <&cpg 908>;
265 clocks = <&cpg CPG_MOD 907>;
267 resets = <&cpg 907>;
280 clocks = <&cpg CPG_MOD 906>;
282 resets = <&cpg 906>;
296 clocks = <&cpg CPG_MOD 926>;
298 resets = <&cpg 926>;
310 clocks = <&cpg CPG_MOD 303>;
313 resets = <&cpg 303>;
329 clocks = <&cpg CPG_MOD 302>;
332 resets = <&cpg 302>;
348 clocks = <&cpg CPG_MOD 301>;
351 resets = <&cpg 301>;
367 clocks = <&cpg CPG_MOD 300>;
370 resets = <&cpg 300>;
374 cpg: clock-controller@e6150000 { label
375 compatible = "renesas,r8a77990-cpg-mssr";
401 clocks = <&cpg CPG_MOD 522>;
403 resets = <&cpg 522>;
418 clocks = <&cpg CPG_MOD 407>;
420 resets = <&cpg 407>;
430 clocks = <&cpg CPG_MOD 931>;
432 resets = <&cpg 931>;
447 clocks = <&cpg CPG_MOD 930>;
449 resets = <&cpg 930>;
464 clocks = <&cpg CPG_MOD 929>;
466 resets = <&cpg 929>;
481 clocks = <&cpg CPG_MOD 928>;
483 resets = <&cpg 928>;
497 clocks = <&cpg CPG_MOD 927>;
499 resets = <&cpg 927>;
513 clocks = <&cpg CPG_MOD 919>;
515 resets = <&cpg 919>;
529 clocks = <&cpg CPG_MOD 918>;
531 resets = <&cpg 918>;
545 clocks = <&cpg CPG_MOD 1003>;
547 resets = <&cpg 1003>;
558 clocks = <&cpg CPG_MOD 520>,
559 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
566 resets = <&cpg 520>;
576 clocks = <&cpg CPG_MOD 519>,
577 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
584 resets = <&cpg 519>;
594 clocks = <&cpg CPG_MOD 518>,
595 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
602 resets = <&cpg 518>;
612 clocks = <&cpg CPG_MOD 517>,
613 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
619 resets = <&cpg 517>;
629 clocks = <&cpg CPG_MOD 516>,
630 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
636 resets = <&cpg 516>;
645 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
653 resets = <&cpg 704>, <&cpg 703>;
664 clocks = <&cpg CPG_MOD 330>;
666 resets = <&cpg 330>;
678 clocks = <&cpg CPG_MOD 331>;
680 resets = <&cpg 331>;
689 clocks = <&cpg CPG_MOD 229>;
690 resets = <&cpg 229>;
720 clocks = <&cpg CPG_MOD 219>;
723 resets = <&cpg 219>;
762 clocks = <&cpg CPG_MOD 218>;
765 resets = <&cpg 218>;
804 clocks = <&cpg CPG_MOD 217>;
807 resets = <&cpg 217>;
937 clocks = <&cpg CPG_MOD 812>;
939 resets = <&cpg 812>;
952 clocks = <&cpg CPG_MOD 916>,
953 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
956 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
959 resets = <&cpg 916>;
968 clocks = <&cpg CPG_MOD 915>,
969 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
972 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
975 resets = <&cpg 915>;
985 clocks = <&cpg CPG_MOD 914>,
986 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
989 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
992 resets = <&cpg 914>;
1007 clocks = <&cpg CPG_MOD 523>;
1009 resets = <&cpg 523>;
1017 clocks = <&cpg CPG_MOD 523>;
1019 resets = <&cpg 523>;
1027 clocks = <&cpg CPG_MOD 523>;
1029 resets = <&cpg 523>;
1037 clocks = <&cpg CPG_MOD 523>;
1039 resets = <&cpg 523>;
1047 clocks = <&cpg CPG_MOD 523>;
1049 resets = <&cpg 523>;
1057 clocks = <&cpg CPG_MOD 523>;
1059 resets = <&cpg 523>;
1067 clocks = <&cpg CPG_MOD 523>;
1069 resets = <&cpg 523>;
1079 clocks = <&cpg CPG_MOD 207>,
1080 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1087 resets = <&cpg 207>;
1096 clocks = <&cpg CPG_MOD 206>,
1097 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1104 resets = <&cpg 206>;
1113 clocks = <&cpg CPG_MOD 310>,
1114 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1121 resets = <&cpg 310>;
1130 clocks = <&cpg CPG_MOD 204>,
1131 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1137 resets = <&cpg 204>;
1146 clocks = <&cpg CPG_MOD 203>,
1147 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1153 resets = <&cpg 203>;
1162 clocks = <&cpg CPG_MOD 202>,
1163 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1169 resets = <&cpg 202>;
1178 clocks = <&cpg CPG_MOD 211>;
1183 resets = <&cpg 211>;
1194 clocks = <&cpg CPG_MOD 210>;
1198 resets = <&cpg 210>;
1209 clocks = <&cpg CPG_MOD 209>;
1213 resets = <&cpg 209>;
1224 clocks = <&cpg CPG_MOD 208>;
1228 resets = <&cpg 208>;
1238 clocks = <&cpg CPG_MOD 807>;
1240 resets = <&cpg 807>;
1266 clocks = <&cpg CPG_MOD 806>;
1268 resets = <&cpg 806>;
1295 clocks = <&cpg CPG_MOD 515>;
1300 resets = <&cpg 515>;
1310 clocks = <&cpg CPG_MOD 514>;
1315 resets = <&cpg 514>;
1325 clocks = <&cpg CPG_MOD 513>;
1330 resets = <&cpg 513>;
1340 clocks = <&cpg CPG_MOD 512>;
1345 resets = <&cpg 512>;
1355 clocks = <&cpg CPG_MOD 511>;
1360 resets = <&cpg 511>;
1370 clocks = <&cpg CPG_MOD 510>;
1375 resets = <&cpg 510>;
1385 clocks = <&cpg CPG_MOD 509>;
1390 resets = <&cpg 509>;
1400 clocks = <&cpg CPG_MOD 508>;
1405 resets = <&cpg 508>;
1431 clocks = <&cpg CPG_MOD 1005>,
1432 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1433 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1434 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1435 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1436 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1437 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1438 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1439 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1440 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1441 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1442 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1443 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1444 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1447 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1460 resets = <&cpg 1005>,
1461 <&cpg 1006>, <&cpg 1007>,
1462 <&cpg 1008>, <&cpg 1009>,
1463 <&cpg 1010>, <&cpg 1011>,
1464 <&cpg 1012>, <&cpg 1013>,
1465 <&cpg 1014>, <&cpg 1015>;
1642 clocks = <&cpg CPG_MOD 502>;
1645 resets = <&cpg 502>;
1663 clocks = <&cpg CPG_MOD 328>;
1665 resets = <&cpg 328>;
1674 clocks = <&cpg CPG_MOD 328>;
1676 resets = <&cpg 328>;
1684 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1688 resets = <&cpg 703>, <&cpg 704>;
1696 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1701 resets = <&cpg 703>, <&cpg 704>;
1710 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1712 resets = <&cpg 703>, <&cpg 704>;
1722 clocks = <&cpg CPG_MOD 314>;
1725 resets = <&cpg 314>;
1735 clocks = <&cpg CPG_MOD 313>;
1738 resets = <&cpg 313>;
1748 clocks = <&cpg CPG_MOD 311>;
1751 resets = <&cpg 311>;
1767 clocks = <&cpg CPG_MOD 408>;
1770 resets = <&cpg 408>;
1793 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1796 resets = <&cpg 319>;
1804 clocks = <&cpg CPG_MOD 626>;
1806 resets = <&cpg 626>;
1813 clocks = <&cpg CPG_MOD 607>;
1815 resets = <&cpg 607>;
1823 clocks = <&cpg CPG_MOD 631>;
1825 resets = <&cpg 631>;
1832 clocks = <&cpg CPG_MOD 611>;
1834 resets = <&cpg 611>;
1842 clocks = <&cpg CPG_MOD 623>;
1844 resets = <&cpg 623>;
1851 clocks = <&cpg CPG_MOD 603>;
1853 resets = <&cpg 603>;
1861 clocks = <&cpg CPG_MOD 622>;
1863 resets = <&cpg 622>;
1870 clocks = <&cpg CPG_MOD 602>;
1872 resets = <&cpg 602>;
1881 clocks = <&cpg CPG_MOD 711>;
1882 resets = <&cpg 711>;
1890 clocks = <&cpg CPG_MOD 710>;
1891 resets = <&cpg 710>;
1898 clocks = <&cpg CPG_MOD 716>;
1900 resets = <&cpg 716>;
1930 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1932 resets = <&cpg 724>;
1969 clocks = <&cpg CPG_MOD 727>;
1971 resets = <&cpg 727>;
1998 clocks = <&cpg CPG_MOD 727>;
2000 resets = <&cpg 726>;