Lines Matching +full:0 +full:xe6550000
20 * The external audio clocks are configured as 0 Hz fixed frequency
26 #clock-cells = <0>;
27 clock-frequency = <0>;
32 #clock-cells = <0>;
33 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
117 #size-cells = <0>;
145 a57_0: cpu@0 {
147 reg = <0x0>;
162 reg = <0x1>;
176 reg = <0x100>;
191 reg = <0x101>;
204 reg = <0x102>;
217 reg = <0x103>;
228 L2_CA57: cache-controller-0 {
245 CPU_SLEEP_0: cpu-sleep-0 {
247 arm,psci-suspend-param = <0x0010000>;
256 arm,psci-suspend-param = <0x0010000>;
267 #clock-cells = <0>;
269 clock-frequency = <0>;
274 #clock-cells = <0>;
276 clock-frequency = <0>;
282 #clock-cells = <0>;
283 clock-frequency = <0>;
310 #clock-cells = <0>;
311 clock-frequency = <0>;
324 reg = <0 0xe6020000 0 0x0c>;
334 reg = <0 0xe6050000 0 0x50>;
338 gpio-ranges = <&pfc 0 0 16>;
349 reg = <0 0xe6051000 0 0x50>;
353 gpio-ranges = <&pfc 0 32 29>;
364 reg = <0 0xe6052000 0 0x50>;
368 gpio-ranges = <&pfc 0 64 15>;
379 reg = <0 0xe6053000 0 0x50>;
383 gpio-ranges = <&pfc 0 96 16>;
394 reg = <0 0xe6054000 0 0x50>;
398 gpio-ranges = <&pfc 0 128 18>;
409 reg = <0 0xe6055000 0 0x50>;
413 gpio-ranges = <&pfc 0 160 26>;
424 reg = <0 0xe6055400 0 0x50>;
428 gpio-ranges = <&pfc 0 192 32>;
439 reg = <0 0xe6055800 0 0x50>;
443 gpio-ranges = <&pfc 0 224 4>;
453 reg = <0 0xe6060000 0 0x50c>;
458 reg = <0 0xe6150000 0 0x1000>;
462 #power-domain-cells = <0>;
468 reg = <0 0xe6160000 0 0x0200>;
473 reg = <0 0xe6180000 0 0x0400>;
479 reg = <0 0xe6198000 0 0x100>,
480 <0 0xe61a0000 0 0x100>,
481 <0 0xe61a8000 0 0x100>;
494 reg = <0 0xe61c0000 0 0x200>;
500 #size-cells = <0>;
503 reg = <0 0xe6500000 0 0x40>;
508 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
509 <&dmac2 0x91>, <&dmac2 0x90>;
517 #size-cells = <0>;
520 reg = <0 0xe6508000 0 0x40>;
525 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
526 <&dmac2 0x93>, <&dmac2 0x92>;
534 #size-cells = <0>;
537 reg = <0 0xe6510000 0 0x40>;
542 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
543 <&dmac2 0x95>, <&dmac2 0x94>;
551 #size-cells = <0>;
554 reg = <0 0xe66d0000 0 0x40>;
559 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
567 #size-cells = <0>;
570 reg = <0 0xe66d8000 0 0x40>;
575 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
583 #size-cells = <0>;
586 reg = <0 0xe66e0000 0 0x40>;
591 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
599 #size-cells = <0>;
602 reg = <0 0xe66e8000 0 0x40>;
607 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
615 #size-cells = <0>;
619 reg = <0 0xe60b0000 0 0x425>;
624 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
633 reg = <0 0xe6540000 0 0x60>;
639 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
640 <&dmac2 0x31>, <&dmac2 0x30>;
651 reg = <0 0xe6550000 0 0x60>;
657 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
658 <&dmac2 0x33>, <&dmac2 0x32>;
669 reg = <0 0xe6560000 0 0x60>;
675 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
676 <&dmac2 0x35>, <&dmac2 0x34>;
687 reg = <0 0xe66a0000 0 0x60>;
693 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
704 reg = <0 0xe66b0000 0 0x60>;
710 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
720 reg = <0 0xe6590000 0 0x200>;
723 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
724 <&usb_dmac1 0>, <&usb_dmac1 1>;
737 reg = <0 0xe65a0000 0 0x100>;
751 reg = <0 0xe65b0000 0 0x100>;
765 reg = <0 0xe65ee000 0 0x90>;
771 #phy-cells = <0>;
778 reg = <0x0 0xe6601000 0 0x1000>;
787 reg = <0 0xe6700000 0 0x10000>;
821 reg = <0 0xe7300000 0 0x10000>;
855 reg = <0 0xe7310000 0 0x10000>;
888 reg = <0 0xe6740000 0 0x1000>;
889 renesas,ipmmu-main = <&ipmmu_mm 0>;
896 reg = <0 0xe7740000 0 0x1000>;
904 reg = <0 0xe6570000 0 0x1000>;
912 reg = <0 0xff8b0000 0 0x1000>;
920 reg = <0 0xe67b0000 0 0x1000>;
929 reg = <0 0xec670000 0 0x1000>;
937 reg = <0 0xfd800000 0 0x1000>;
945 reg = <0 0xfd950000 0 0x1000>;
953 reg = <0 0xffc80000 0 0x1000>;
961 reg = <0 0xfe6b0000 0 0x1000>;
969 reg = <0 0xfebd0000 0 0x1000>;
978 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1016 #size-cells = <0>;
1022 reg = <0 0xe6e30000 0 8>;
1032 reg = <0 0xe6e31000 0 8>;
1042 reg = <0 0xe6e32000 0 8>;
1052 reg = <0 0xe6e33000 0 8>;
1062 reg = <0 0xe6e34000 0 8>;
1072 reg = <0 0xe6e35000 0 8>;
1082 reg = <0 0xe6e36000 0 8>;
1093 reg = <0 0xe6e60000 0 64>;
1099 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1100 <&dmac2 0x51>, <&dmac2 0x50>;
1110 reg = <0 0xe6e68000 0 64>;
1116 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1117 <&dmac2 0x53>, <&dmac2 0x52>;
1127 reg = <0 0xe6e88000 0 64>;
1133 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1134 <&dmac2 0x13>, <&dmac2 0x12>;
1144 reg = <0 0xe6c50000 0 64>;
1150 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1160 reg = <0 0xe6c40000 0 64>;
1166 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1176 reg = <0 0xe6f30000 0 64>;
1182 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1183 <&dmac2 0x5b>, <&dmac2 0x5a>;
1191 reg = <0 0xe6ef0000 0 0x1000>;
1196 reg = <0 0xe6ef1000 0 0x1000>;
1201 reg = <0 0xe6ef2000 0 0x1000>;
1206 reg = <0 0xe6ef3000 0 0x1000>;
1211 reg = <0 0xe6ef4000 0 0x1000>;
1216 reg = <0 0xe6ef5000 0 0x1000>;
1221 reg = <0 0xe6ef6000 0 0x1000>;
1226 reg = <0 0xe6ef7000 0 0x1000>;
1234 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1240 * clkout : #clock-cells = <0>; <&rcar_sound>;
1244 reg = <0 0xec500000 0 0x1000>, /* SCU */
1245 <0 0xec5a0000 0 0x100>, /* ADG */
1246 <0 0xec540000 0 0x1000>, /* SSIU */
1247 <0 0xec541000 0 0x280>, /* SSI */
1248 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1271 "ssi.1", "ssi.0",
1274 "src.1", "src.0",
1275 "mix.1", "mix.0",
1276 "ctu.1", "ctu.0",
1277 "dvc.0", "dvc.1",
1289 "ssi.1", "ssi.0";
1293 ctu00: ctu-0 { };
1304 dvc0: dvc-0 {
1305 dmas = <&audma1 0xbc>;
1309 dmas = <&audma1 0xbe>;
1315 mix0: mix-0 { };
1320 src0: src-0 {
1322 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1327 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1332 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1337 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1342 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1347 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1352 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1357 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1362 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1367 dmas = <&audma0 0x97>, <&audma1 0xba>;
1373 ssi0: ssi-0 {
1375 dmas = <&audma0 0x01>, <&audma1 0x02>;
1380 dmas = <&audma0 0x03>, <&audma1 0x04>;
1385 dmas = <&audma0 0x05>, <&audma1 0x06>;
1390 dmas = <&audma0 0x07>, <&audma1 0x08>;
1395 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1400 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1405 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1410 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1415 dmas = <&audma0 0x11>, <&audma1 0x12>;
1420 dmas = <&audma0 0x13>, <&audma1 0x14>;
1426 ssiu00: ssiu-0 {
1427 dmas = <&audma0 0x15>, <&audma1 0x16>;
1431 dmas = <&audma0 0x35>, <&audma1 0x36>;
1435 dmas = <&audma0 0x37>, <&audma1 0x38>;
1439 dmas = <&audma0 0x47>, <&audma1 0x48>;
1443 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1447 dmas = <&audma0 0x43>, <&audma1 0x44>;
1451 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1455 dmas = <&audma0 0x53>, <&audma1 0x54>;
1459 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1463 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1467 dmas = <&audma0 0x57>, <&audma1 0x58>;
1471 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1475 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1479 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1483 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1487 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1491 dmas = <&audma0 0x63>, <&audma1 0x64>;
1495 dmas = <&audma0 0x67>, <&audma1 0x68>;
1499 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1503 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1507 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1511 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1515 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1519 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1523 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1527 dmas = <&audma0 0x21>, <&audma1 0x22>;
1531 dmas = <&audma0 0x23>, <&audma1 0x24>;
1535 dmas = <&audma0 0x25>, <&audma1 0x26>;
1539 dmas = <&audma0 0x27>, <&audma1 0x28>;
1543 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1547 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1551 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1555 dmas = <&audma0 0x71>, <&audma1 0x72>;
1559 dmas = <&audma0 0x17>, <&audma1 0x18>;
1563 dmas = <&audma0 0x19>, <&audma1 0x1A>;
1567 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1571 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1575 dmas = <&audma0 0x1F>, <&audma1 0x20>;
1579 dmas = <&audma0 0x31>, <&audma1 0x32>;
1583 dmas = <&audma0 0x33>, <&audma1 0x34>;
1587 dmas = <&audma0 0x73>, <&audma1 0x74>;
1591 dmas = <&audma0 0x75>, <&audma1 0x76>;
1595 dmas = <&audma0 0x79>, <&audma1 0x7a>;
1599 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1603 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1607 dmas = <&audma0 0x7F>, <&audma1 0x80>;
1611 dmas = <&audma0 0x81>, <&audma1 0x82>;
1615 dmas = <&audma0 0x83>, <&audma1 0x84>;
1619 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1623 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1627 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1631 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1640 reg = <0 0xec700000 0 0x10000>;
1669 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1682 reg = <0 0xec720000 0 0x10000>;
1724 reg = <0 0xee000000 0 0xc00>;
1735 reg = <0 0xee020000 0 0x400>;
1745 reg = <0 0xee080000 0 0x100>;
1757 reg = <0 0xee0a0000 0 0x100>;
1769 reg = <0 0xee080100 0 0x100>;
1782 reg = <0 0xee0a0100 0 0x100>;
1796 reg = <0 0xee080200 0 0x700>;
1808 reg = <0 0xee0a0200 0 0x700>;
1819 reg = <0 0xee100000 0 0x2000>;
1831 reg = <0 0xee120000 0 0x2000>;
1843 reg = <0 0xee140000 0 0x2000>;
1855 reg = <0 0xee160000 0 0x2000>;
1867 #address-cells = <0>;
1869 reg = <0x0 0xf1010000 0 0x1000>,
1870 <0x0 0xf1020000 0 0x20000>,
1871 <0x0 0xf1040000 0 0x20000>,
1872 <0x0 0xf1060000 0 0x20000>;
1884 reg = <0 0xfe000000 0 0x80000>;
1887 bus-range = <0x00 0xff>;
1889 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1890 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1891 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1892 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1894 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1899 interrupt-map-mask = <0 0 0 0>;
1900 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1911 reg = <0 0xee800000 0 0x80000>;
1914 bus-range = <0x00 0xff>;
1916 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
1917 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
1918 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
1919 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1921 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1926 interrupt-map-mask = <0 0 0 0>;
1927 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1937 reg = <0 0xfe950000 0 0x200>;
1945 reg = <0 0xfe96f000 0 0x200>;
1953 reg = <0 0xfe9af000 0 0x200>;
1962 reg = <0 0xfea27000 0 0x200>;
1971 reg = <0 0xfea2f000 0 0x200>;
1980 reg = <0 0xfea37000 0 0x200>;
1989 reg = <0 0xfe960000 0 0x8000>;
2000 reg = <0 0xfea20000 0 0x5000>;
2011 reg = <0 0xfea28000 0 0x5000>;
2022 reg = <0 0xfea30000 0 0x5000>;
2033 reg = <0 0xfe9a0000 0 0x8000>;
2043 reg = <0 0xfea80000 0 0x10000>;
2048 #size-cells = <0>;
2052 #size-cells = <0>;
2059 reg = <0 0xfeaa0000 0 0x10000>;
2064 #size-cells = <0>;
2068 #size-cells = <0>;
2077 reg = <0 0xfead0000 0 0x10000>;
2087 #size-cells = <0>;
2088 port@0 {
2089 reg = <0>;
2106 reg = <0 0xfeb00000 0 0x70000>;
2112 clock-names = "du.0", "du.1", "du.2";
2114 reset-names = "du.0", "du.2";
2116 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2121 #size-cells = <0>;
2123 port@0 {
2124 reg = <0>;
2144 reg = <0 0xfff00044 0 4>;
2152 thermal-sensors = <&tsc 0>;
2193 cooling-device = <&a53_0 0 2>;
2224 #clock-cells = <0>;
2225 clock-frequency = <0>;
2230 #clock-cells = <0>;
2231 clock-frequency = <0>;