Lines Matching +full:1 +full:e40000
116 qcom,client-id = <1>;
275 qcom,freq-domain = <&cpufreq_hw 1>;
297 qcom,freq-domain = <&cpufreq_hw 1>;
353 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
363 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
373 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
550 #hwlock-cells = <1>;
572 #qcom,smem-state-cells = <1>;
596 #qcom,smem-state-cells = <1>;
613 qcom,remote-pid = <1>;
617 #qcom,smem-state-cells = <1>;
628 #qcom,smem-state-cells = <1>;
657 #clock-cells = <1>;
658 #reset-cells = <1>;
659 #power-domain-cells = <1>;
671 #address-cells = <1>;
672 #size-cells = <1>;
676 bits = <1 3>;
704 mmc-ddr-1_8v;
705 mmc-hs200-1_8v;
706 mmc-hs400-1_8v;
771 #address-cells = <1>;
789 #address-cells = <1>;
823 #address-cells = <1>;
841 #address-cells = <1>;
875 #address-cells = <1>;
909 #address-cells = <1>;
927 #address-cells = <1>;
961 #address-cells = <1>;
995 #address-cells = <1>;
1013 #address-cells = <1>;
1062 #address-cells = <1>;
1080 #address-cells = <1>;
1114 #address-cells = <1>;
1148 #address-cells = <1>;
1166 #address-cells = <1>;
1200 #address-cells = <1>;
1234 #address-cells = <1>;
1252 #address-cells = <1>;
1286 #address-cells = <1>;
1304 #address-cells = <1>;
1387 ipa_virt: interconnect@1e00000 {
1394 ipa: ipa@1e40000 {
1408 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1425 <&ipa_smp2p_out 1>;
1434 tcsr_mutex_regs: syscon@1f40000 {
1439 tcsr_regs: syscon@1fc0000 {
1855 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1894 qcom,remote-pid = <1>;
1963 #iommu-cells = <1>;
2020 #clock-cells = <1>;
2021 #reset-cells = <1>;
2022 #power-domain-cells = <1>;
2059 #address-cells = <1>;
2087 #address-cells = <1>;
2115 #address-cells = <1>;
2125 port@1 {
2126 reg = <1>;
2192 #address-cells = <1>;
2429 #address-cells = <1>;
2439 port@1 {
2440 reg = <1>;
2578 #address-cells = <1>;
2611 #clock-cells = <1>;
2783 #clock-cells = <1>;
2784 #reset-cells = <1>;
2785 #power-domain-cells = <1>;
2812 #interrupt-cells = <1>;
2856 #address-cells = <1>;
2920 #address-cells = <1>;
2926 #address-cells = <1>;
2936 port@1 {
2937 reg = <1>;
2972 #clock-cells = <1>;
2989 <&dsi_phy 1>,
2998 #clock-cells = <1>;
2999 #reset-cells = <1>;
3000 #power-domain-cells = <1>;
3006 qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
3015 #reset-cells = <1>;
3026 #thermal-sensor-cells = <1>;
3037 #thermal-sensor-cells = <1>;
3043 #reset-cells = <1>;
3053 #power-domain-cells = <1>;
3065 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3068 #address-cells = <1>;
3069 #size-cells = <1>;
3079 #global-interrupts = <1>;
3177 #msi-cells = <1>;
3186 #mbox-cells = <1>;
3211 frame-number = <1>;
3258 reg-names = "drv-0", "drv-1", "drv-2";
3267 <CONTROL_TCS 1>;
3273 #clock-cells = <1>;
3278 #power-domain-cells = <1>;
3342 #interconnect-cells = <1>;
3353 #freq-domain-cells = <1>;
3388 #clock-cells = <1>;
3389 #power-domain-cells = <1>;
3398 #clock-cells = <1>;
3399 #power-domain-cells = <1>;
3408 thermal-sensors = <&tsens0 1>;
3990 thermal-sensors = <&tsens1 1>;
4178 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,