Lines Matching refs:gcc
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
844 gcc: clock-controller@100000 { label
845 compatible = "qcom,gcc-msm8998";
953 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
954 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
955 <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
956 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
957 <&gcc GCC_PCIE_0_AUX_CLK>;
960 power-domains = <&gcc PCIE_0_GDSC>;
972 clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
973 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
974 <&gcc GCC_PCIE_CLKREF_CLK>;
977 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
987 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
1001 power-domains = <&gcc UFS_GDSC>;
1014 <&gcc GCC_UFS_AXI_CLK>,
1015 <&gcc GCC_AGGRE1_UFS_AXI_CLK>,
1016 <&gcc GCC_UFS_AHB_CLK>,
1017 <&gcc GCC_UFS_UNIPRO_CORE_CLK>,
1019 <&gcc GCC_UFS_TX_SYMBOL_0_CLK>,
1020 <&gcc GCC_UFS_RX_SYMBOL_0_CLK>,
1021 <&gcc GCC_UFS_RX_SYMBOL_1_CLK>;
1032 resets = <&gcc GCC_UFS_BCR>;
1047 <&gcc GCC_UFS_CLKREF_CLK>,
1048 <&gcc GCC_UFS_PHY_AUX_CLK>;
1094 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1095 <&gcc GCC_BIMC_MSS_Q6_AXI_CLK>,
1096 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1097 <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
1098 <&gcc GCC_MSS_SNOC_AXI_CLK>,
1099 <&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>,
1108 resets = <&gcc GCC_MSS_RESTART>;
1141 <&gcc GPLL0_OUT_MAIN>;
1661 clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>,
1662 <&gcc GCC_USB30_MASTER_CLK>,
1663 <&gcc GCC_AGGRE1_USB3_AXI_CLK>,
1664 <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1665 <&gcc GCC_USB30_SLEEP_CLK>;
1669 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1670 <&gcc GCC_USB30_MASTER_CLK>;
1677 power-domains = <&gcc USB_30_GDSC>;
1679 resets = <&gcc GCC_USB_30_BCR>;
1703 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
1704 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1705 <&gcc GCC_USB3_CLKREF_CLK>;
1708 resets = <&gcc GCC_USB3_PHY_BCR>,
1709 <&gcc GCC_USB3PHY_PHY_BCR>;
1719 clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
1731 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1732 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
1735 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
1750 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
1751 <&gcc GCC_SDCC2_APPS_CLK>,
1761 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1774 clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
1775 <&gcc GCC_BLSP1_AHB_CLK>;
1789 clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
1790 <&gcc GCC_BLSP1_AHB_CLK>;
1804 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
1805 <&gcc GCC_BLSP1_AHB_CLK>;
1819 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1820 <&gcc GCC_BLSP1_AHB_CLK>;
1834 clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
1835 <&gcc GCC_BLSP1_AHB_CLK>;
1849 clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
1850 <&gcc GCC_BLSP1_AHB_CLK>;
1864 clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
1865 <&gcc GCC_BLSP1_AHB_CLK>;
1878 clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
1879 <&gcc GCC_BLSP2_AHB_CLK>;
1889 clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
1890 <&gcc GCC_BLSP2_AHB_CLK>;
1904 clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
1905 <&gcc GCC_BLSP2_AHB_CLK>;
1919 clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>,
1920 <&gcc GCC_BLSP2_AHB_CLK>;
1934 clocks = <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>,
1935 <&gcc GCC_BLSP2_AHB_CLK>;
1949 clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>,
1950 <&gcc GCC_BLSP2_AHB_CLK>;
1964 clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
1965 <&gcc GCC_BLSP2_AHB_CLK>;