Lines Matching +full:0 +full:xfd510000
19 #clock-cells = <0>;
25 #clock-cells = <0>;
32 #size-cells = <0>;
34 CPU0: cpu@0 {
37 reg = <0x0 0x0>;
49 reg = <0x0 0x1>;
57 reg = <0x0 0x2>;
65 reg = <0x0 0x3>;
73 reg = <0x0 0x100>;
85 reg = <0x0 0x101>;
93 reg = <0x0 0x101>;
101 reg = <0x0 0x101>;
154 reg = <0 0 0 0>;
173 reg = <0x0 0x6a00000 0x0 0x200000>;
182 qcom,ipc = <&apcs 8 0>;
184 qcom,local-pid = <0>;
210 ranges = <0 0 0 0xffffffff>;
217 reg = <0xf9000000 0x1000>,
218 <0xf9002000 0x1000>;
223 reg = <0xf900d000 0x2000>;
232 reg = <0xf9020000 0x1000>;
235 frame-number = <0>;
238 reg = <0xf9021000 0x1000>,
239 <0xf9022000 0x1000>;
245 reg = <0xf9023000 0x1000>;
252 reg = <0xf9024000 0x1000>;
259 reg = <0xf9025000 0x1000>;
266 reg = <0xf9026000 0x1000>;
273 reg = <0xf9027000 0x1000>;
280 reg = <0xf9028000 0x1000>;
287 reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
300 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
310 reg = <0xf9904000 0x19000>;
315 qcom,ee = <0>;
323 reg = <0xf991e000 0x1000>;
329 pinctrl-0 = <&blsp1_uart2_default>;
336 reg = <0xf9923000 0x500>;
343 pinctrl-0 = <&i2c1_default>;
346 #size-cells = <0>;
352 reg = <0xf9923000 0x500>;
361 pinctrl-0 = <&blsp1_spi0_default>;
364 #size-cells = <0>;
370 reg = <0xf9924000 0x500>;
379 pinctrl-0 = <&i2c2_default>;
382 #size-cells = <0>;
390 reg = <0xf9926000 0x500>;
397 pinctrl-0 = <&i2c4_default>;
400 #size-cells = <0>;
406 reg = <0xf9944000 0x19000>;
411 qcom,ee = <0>;
423 reg = <0xf9928000 0x500>;
432 pinctrl-0 = <&i2c6_default>;
435 #size-cells = <0>;
441 reg = <0xf995e000 0x1000>;
449 pinctrl-0 = <&blsp2_uart2_default>;
456 reg = <0xf9967000 0x500>;
465 pinctrl-0 = <&i2c5_default>;
468 #size-cells = <0>;
477 reg = <0xfc400000 0x2000>;
482 reg = <0xfc428000 0x4000>;
487 reg = <0xfc4ab000 0x4>;
492 reg = <0xfc4cf000 0x1000>,
493 <0xfc4cb000 0x1000>,
494 <0xfc4ca000 0x1000>;
498 qcom,ee = <0>;
499 qcom,channel = <0>;
501 #size-cells = <0>;
508 reg = <0xfd484000 0x2000>;
513 reg = <0xfd510000 0x4000>;
516 gpio-ranges = <&tlmm 0 0 146>;
691 syscon = <&tcsr_mutex_regs 0 0x80>;
697 interrupts = <GIC_PPI 2 0xff08>,
698 <GIC_PPI 3 0xff08>,
699 <GIC_PPI 4 0xff08>,
700 <GIC_PPI 1 0xff08>;