Lines Matching +full:smd +full:- +full:rpm

1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
9 interrupt-parent = <&intc>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a53";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
26 L2_0: l2-cache {
28 cache-level = <2>;
34 compatible = "arm,cortex-a53";
36 next-level-cache = <&L2_0>;
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
44 next-level-cache = <&L2_0>;
45 enable-method = "psci";
50 compatible = "arm,cortex-a53";
52 next-level-cache = <&L2_0>;
53 enable-method = "psci";
58 compatible = "arm,cortex-a57";
60 next-level-cache = <&L2_1>;
61 enable-method = "psci";
62 L2_1: l2-cache {
64 cache-level = <2>;
70 compatible = "arm,cortex-a57";
72 next-level-cache = <&L2_1>;
73 enable-method = "psci";
76 cpu-map {
109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 clock-frequency = <19200000>;
115 compatible = "fixed-clock";
116 #clock-cells = <0>;
117 clock-frequency = <32768>;
123 compatible = "qcom,scm-msm8994", "qcom,scm";
134 compatible = "arm,cortex-a53-pmu";
139 compatible = "arm,psci-0.2";
143 reserved-memory {
144 #address-cells = <2>;
145 #size-cells = <2>;
150 no-map;
155 compatible = "qcom,sfpb-mutex";
157 #hwlock-cells = <1>;
162 memory-region = <&smem_region>;
163 qcom,rpm-msg-ram = <&rpm_msg_ram>;
168 #address-cells = <1>;
169 #size-cells = <1>;
171 compatible = "simple-bus";
173 intc: interrupt-controller@f9000000 {
174 compatible = "qcom,msm-qgic2";
175 interrupt-controller;
176 #interrupt-cells = <3>;
182 compatible = "qcom,msm8994-apcs-kpss-global", "syscon";
184 #mbox-cells = <1>;
188 #address-cells = <1>;
189 #size-cells = <1>;
191 compatible = "arm,armv7-timer-mem";
195 frame-number = <0>;
203 frame-number = <1>;
210 frame-number = <2>;
217 frame-number = <3>;
224 frame-number = <4>;
231 frame-number = <5>;
238 frame-number = <6>;
246 compatible = "qcom,sdhci-msm-v4";
248 reg-names = "hc_mem", "core_mem";
252 interrupt-names = "hc_irq", "pwr_irq";
257 clock-names = "core", "iface", "xo";
259 pinctrl-names = "default", "sleep";
260 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
262 pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
265 regulator-always-on;
266 bus-width = <8>;
267 non-removable;
273 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
276 clock-names = "core", "iface";
279 pinctrl-names = "default", "sleep";
280 pinctrl-0 = <&blsp1_uart2_default>;
281 pinctrl-1 = <&blsp1_uart2_sleep>;
286 compatible = "qcom,i2c-qup-v2.2.1";
291 clock-names = "iface", "core";
292 clock-frequency = <400000>;
293 pinctrl-names = "default", "sleep";
294 pinctrl-0 = <&i2c2_default>;
295 pinctrl-1 = <&i2c2_sleep>;
296 #address-cells = <1>;
297 #size-cells = <0>;
304 compatible = "qcom,i2c-qup-v2.2.1";
309 clock-names = "iface", "core";
310 clock-frequency = <400000>;
311 pinctrl-names = "default", "sleep";
312 pinctrl-0 = <&i2c13_default>;
313 pinctrl-1 = <&i2c13_sleep>;
314 #address-cells = <1>;
315 #size-cells = <0>;
320 compatible = "qcom,i2c-qup-v2.2.1";
325 clock-names = "iface", "core";
326 clock-frequency = <400000>;
327 pinctrl-names = "default", "sleep";
328 pinctrl-0 = <&i2c6_default>;
329 pinctrl-1 = <&i2c6_sleep>;
330 #address-cells = <1>;
331 #size-cells = <0>;
336 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
339 clock-names = "core", "iface";
342 pinctrl-names = "default", "sleep";
343 pinctrl-0 = <&blsp2_uart2_default>;
344 pinctrl-1 = <&blsp2_uart2_sleep>;
349 compatible = "qcom,i2c-qup-v2.2.1";
354 clock-names = "iface", "core";
355 clock-frequency = <400000>;
356 pinctrl-names = "default", "sleep";
357 pinctrl-0 = <&i2c7_default>;
358 pinctrl-1 = <&i2c7_sleep>;
359 #address-cells = <1>;
360 #size-cells = <0>;
365 compatible = "qcom,i2c-qup-v2.2.1";
370 clock-names = "iface", "core";
371 clock-frequency = <100000>;
372 pinctrl-names = "default", "sleep";
373 pinctrl-0 = <&i2c5_default>;
374 pinctrl-1 = <&i2c5_sleep>;
375 #address-cells = <1>;
376 #size-cells = <0>;
380 gcc: clock-controller@fc400000 {
381 compatible = "qcom,gcc-msm8994";
382 #clock-cells = <1>;
383 #reset-cells = <1>;
384 #power-domain-cells = <1>;
389 compatible = "qcom,rpm-msg-ram";
399 compatible = "qcom,spmi-pmic-arb";
403 reg-names = "core", "intr", "cnfg";
404 interrupt-names = "periph_irq";
408 #address-cells = <2>;
409 #size-cells = <0>;
410 interrupt-controller;
411 #interrupt-cells = <4>;
415 #address-cells = <1>;
416 #size-cells = <1>;
422 compatible = "qcom,msm8994-pinctrl";
425 gpio-controller;
426 gpio-ranges = <&tlmm 0 0 146>;
427 #gpio-cells = <2>;
428 interrupt-controller;
429 #interrupt-cells = <2>;
431 blsp1_uart2_default: blsp1-uart2-default {
434 drive-strength = <16>;
435 bias-disable;
438 blsp1_uart2_sleep: blsp1-uart2-sleep {
441 drive-strength = <2>;
442 bias-pull-down;
445 blsp2_uart2_default: blsp2-uart2-default {
448 drive-strength = <16>;
449 bias-disable;
452 blsp2_uart2_sleep: blsp2-uart2-sleep {
455 drive-strength = <2>;
456 bias-pull-down;
459 sdc1_clk_on: clk-on {
461 bias-disable;
462 drive-strength = <6>;
465 sdc1_clk_off: clk-off {
467 bias-disable;
468 drive-strength = <2>;
471 sdc1_cmd_on: cmd-on {
473 bias-pull-up;
474 drive-strength = <6>;
477 sdc1_cmd_off: cmd-off {
479 bias-pull-up;
480 drive-strength = <2>;
483 sdc1_data_on: data-on {
485 bias-pull-up;
486 drive-strength = <6>;
489 sdc1_data_off: data-off {
491 bias-pull-up;
492 drive-strength = <2>;
495 sdc1_rclk_on: rclk-on {
497 bias-pull-down;
500 sdc1_rclk_off: rclk-off {
502 bias-pull-down;
505 i2c2_default: i2c2-default {
508 drive-strength = <2>;
509 bias-disable;
512 i2c2_sleep: i2c2-sleep {
515 drive-strength = <2>;
516 bias-disable;
519 i2c5_default: i2c5-default {
523 drive-strength = <2>;
524 bias-disable;
527 i2c5_sleep: i2c5-sleep {
530 drive-strength = <2>;
531 bias-disable;
534 i2c6_default: i2c6-default {
537 drive-strength = <2>;
538 bias-disable;
541 i2c6_sleep: i2c6-sleep {
544 drive-strength = <2>;
545 bias-disable;
548 i2c7_default: i2c7-default {
551 drive-strength = <2>;
552 bias-disable;
555 i2c7_sleep: i2c7-sleep {
558 drive-strength = <2>;
559 bias-disable;
562 i2c13_default: i2c13-default {
566 drive-strength = <2>;
567 bias-disable;
570 i2c13_sleep: i2c13-sleep {
573 drive-strength = <2>;
574 bias-disable;
579 smd_rpm: smd {
580 compatible = "qcom,smd";
581 rpm {
584 qcom,smd-edge = <15>;
585 qcom,local-pid = <0>;
586 qcom,remote-pid = <6>;
588 rpm_requests: rpm-requests {
589 compatible = "qcom,rpm-msm8994";
590 qcom,smd-channels = "rpm_requests";
593 compatible = "qcom,rpmcc-msm8992";
594 #clock-cells = <1>;
601 compatible = "arm,armv8-timer";
608 vreg_vph_pwr: vreg-vph-pwr {
609 compatible = "regulator-fixed";
611 regulator-name = "vph-pwr";
613 regulator-min-microvolt = <3600000>;
614 regulator-max-microvolt = <3600000>;
616 regulator-always-on;