Lines Matching refs:gcc
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
11 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
227 clocks = <&gcc GCC_CRYPTO_CLK>,
228 <&gcc GCC_CRYPTO_AXI_CLK>,
229 <&gcc GCC_CRYPTO_AHB_CLK>;
396 clocks = <&gcc GCC_PRNG_AHB_CLK>;
866 gcc: clock-controller@1800000 { label
867 compatible = "qcom,gcc-msm8916";
891 power-domains = <&gcc MDSS_GDSC>;
893 clocks = <&gcc GCC_MDSS_AHB_CLK>,
894 <&gcc GCC_MDSS_AXI_CLK>,
895 <&gcc GCC_MDSS_VSYNC_CLK>;
917 clocks = <&gcc GCC_MDSS_AHB_CLK>,
918 <&gcc GCC_MDSS_AXI_CLK>,
919 <&gcc GCC_MDSS_MDP_CLK>,
920 <&gcc GCC_MDSS_VSYNC_CLK>;
949 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
950 <&gcc PCLK0_CLK_SRC>;
954 clocks = <&gcc GCC_MDSS_MDP_CLK>,
955 <&gcc GCC_MDSS_AHB_CLK>,
956 <&gcc GCC_MDSS_AXI_CLK>,
957 <&gcc GCC_MDSS_BYTE0_CLK>,
958 <&gcc GCC_MDSS_PCLK0_CLK>,
959 <&gcc GCC_MDSS_ESC0_CLK>;
1003 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1041 power-domains = <&gcc VFE_GDSC>;
1042 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1043 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
1044 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
1045 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
1046 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
1047 <&gcc GCC_CAMSS_CSI0_CLK>,
1048 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
1049 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
1050 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
1051 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
1052 <&gcc GCC_CAMSS_CSI1_CLK>,
1053 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
1054 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
1055 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
1056 <&gcc GCC_CAMSS_AHB_CLK>,
1057 <&gcc GCC_CAMSS_VFE0_CLK>,
1058 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
1059 <&gcc GCC_CAMSS_VFE_AHB_CLK>,
1060 <&gcc GCC_CAMSS_VFE_AXI_CLK>;
1094 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1095 <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1096 <&gcc GCC_CAMSS_CCI_CLK>,
1097 <&gcc GCC_CAMSS_AHB_CLK>;
1100 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1101 <&gcc GCC_CAMSS_CCI_CLK>;
1129 <&gcc GCC_OXILI_GFX3D_CLK>,
1130 <&gcc GCC_OXILI_AHB_CLK>,
1131 <&gcc GCC_OXILI_GMEM_CLK>,
1132 <&gcc GCC_BIMC_GFX_CLK>,
1133 <&gcc GCC_BIMC_GPU_CLK>,
1134 <&gcc GFX3D_CLK_SRC>;
1135 power-domains = <&gcc OXILI_GDSC>;
1155 power-domains = <&gcc VENUS_GDSC>;
1156 clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
1157 <&gcc GCC_VENUS0_AHB_CLK>,
1158 <&gcc GCC_VENUS0_AXI_CLK>;
1180 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1181 <&gcc GCC_APSS_TCU_CLK>;
1213 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1214 <&gcc GCC_GFX_TCU_CLK>;
1266 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1267 <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
1268 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1325 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1326 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
1327 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
1328 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
1329 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
1330 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
1331 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
1354 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1355 <&gcc GCC_CODEC_DIGCODEC_CLK>;
1368 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
1369 <&gcc GCC_SDCC1_AHB_CLK>,
1386 clocks = <&gcc GCC_SDCC2_APPS_CLK>,
1387 <&gcc GCC_SDCC2_AHB_CLK>,
1398 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1409 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1423 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1437 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1438 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
1452 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
1453 <&gcc GCC_BLSP1_AHB_CLK>;
1469 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1470 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
1484 clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
1485 <&gcc GCC_BLSP1_AHB_CLK>;
1501 clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
1502 <&gcc GCC_BLSP1_AHB_CLK>;
1518 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1519 <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
1533 clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
1534 <&gcc GCC_BLSP1_AHB_CLK>;
1550 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1551 <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
1565 clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
1566 <&gcc GCC_BLSP1_AHB_CLK>;
1582 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1583 <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
1597 clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
1598 <&gcc GCC_BLSP1_AHB_CLK>;
1616 clocks = <&gcc GCC_USB_HS_AHB_CLK>,
1617 <&gcc GCC_USB_HS_SYSTEM_CLK>;
1619 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1621 resets = <&gcc GCC_USB_HS_BCR>;
1639 clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
1641 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
1722 clocks = <&a53pll>, <&gcc GPLL0_VOTE>;