Lines Matching +full:smd +full:- +full:rpm
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&intc>;
17 #address-cells = <2>;
18 #size-cells = <2>;
33 reserved-memory {
34 #address-cells = <2>;
35 #size-cells = <2>;
38 tz-apps@86000000 {
40 no-map;
45 no-map;
50 no-map;
55 no-map;
60 no-map;
64 compatible = "qcom,rmtfs-mem";
66 no-map;
68 qcom,client-id = <1>;
73 no-map;
78 no-map;
83 no-map;
88 no-map;
92 no-map;
98 xo_board: xo-board {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <19200000>;
104 sleep_clk: sleep-clk {
105 compatible = "fixed-clock";
106 #clock-cells = <0>;
107 clock-frequency = <32768>;
112 #address-cells = <1>;
113 #size-cells = <0>;
117 compatible = "arm,cortex-a53";
119 next-level-cache = <&L2_0>;
120 enable-method = "psci";
122 operating-points-v2 = <&cpu_opp_table>;
123 #cooling-cells = <2>;
124 power-domains = <&CPU_PD0>;
125 power-domain-names = "psci";
130 compatible = "arm,cortex-a53";
132 next-level-cache = <&L2_0>;
133 enable-method = "psci";
135 operating-points-v2 = <&cpu_opp_table>;
136 #cooling-cells = <2>;
137 power-domains = <&CPU_PD1>;
138 power-domain-names = "psci";
143 compatible = "arm,cortex-a53";
145 next-level-cache = <&L2_0>;
146 enable-method = "psci";
148 operating-points-v2 = <&cpu_opp_table>;
149 #cooling-cells = <2>;
150 power-domains = <&CPU_PD2>;
151 power-domain-names = "psci";
156 compatible = "arm,cortex-a53";
158 next-level-cache = <&L2_0>;
159 enable-method = "psci";
161 operating-points-v2 = <&cpu_opp_table>;
162 #cooling-cells = <2>;
163 power-domains = <&CPU_PD3>;
164 power-domain-names = "psci";
167 L2_0: l2-cache {
169 cache-level = <2>;
172 idle-states {
173 entry-method = "psci";
175 CPU_SLEEP_0: cpu-sleep-0 {
176 compatible = "arm,idle-state";
177 idle-state-name = "standalone-power-collapse";
178 arm,psci-suspend-param = <0x40000002>;
179 entry-latency-us = <130>;
180 exit-latency-us = <150>;
181 min-residency-us = <2000>;
182 local-timer-stop;
186 domain-idle-states {
188 CLUSTER_RET: cluster-retention {
189 compatible = "domain-idle-state";
190 arm,psci-suspend-param = <0x41000012>;
191 entry-latency-us = <500>;
192 exit-latency-us = <500>;
193 min-residency-us = <2000>;
196 CLUSTER_PWRDN: cluster-gdhs {
197 compatible = "domain-idle-state";
198 arm,psci-suspend-param = <0x41000032>;
199 entry-latency-us = <2000>;
200 exit-latency-us = <2000>;
201 min-residency-us = <6000>;
206 cpu_opp_table: cpu-opp-table {
207 compatible = "operating-points-v2";
208 opp-shared;
210 opp-200000000 {
211 opp-hz = /bits/ 64 <200000000>;
213 opp-400000000 {
214 opp-hz = /bits/ 64 <400000000>;
216 opp-800000000 {
217 opp-hz = /bits/ 64 <800000000>;
219 opp-998400000 {
220 opp-hz = /bits/ 64 <998400000>;
226 compatible = "qcom,scm-msm8916", "qcom,scm";
230 clock-names = "core", "bus", "iface";
231 #reset-cells = <1>;
233 qcom,dload-mode = <&tcsr 0x6100>;
238 compatible = "arm,cortex-a53-pmu";
243 compatible = "arm,psci-1.0";
246 CPU_PD0: power-domain-cpu0 {
247 #power-domain-cells = <0>;
248 power-domains = <&CLUSTER_PD>;
249 domain-idle-states = <&CPU_SLEEP_0>;
252 CPU_PD1: power-domain-cpu1 {
253 #power-domain-cells = <0>;
254 power-domains = <&CLUSTER_PD>;
255 domain-idle-states = <&CPU_SLEEP_0>;
258 CPU_PD2: power-domain-cpu2 {
259 #power-domain-cells = <0>;
260 power-domains = <&CLUSTER_PD>;
261 domain-idle-states = <&CPU_SLEEP_0>;
264 CPU_PD3: power-domain-cpu3 {
265 #power-domain-cells = <0>;
266 power-domains = <&CLUSTER_PD>;
267 domain-idle-states = <&CPU_SLEEP_0>;
270 CLUSTER_PD: power-domain-cluster {
271 #power-domain-cells = <0>;
272 domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
276 smd {
277 compatible = "qcom,smd";
279 rpm {
282 qcom,smd-edge = <15>;
284 rpm_requests: rpm-requests {
285 compatible = "qcom,rpm-msm8916";
286 qcom,smd-channels = "rpm_requests";
288 rpmcc: clock-controller {
289 compatible = "qcom,rpmcc-msm8916";
290 #clock-cells = <1>;
299 memory-region = <&smem_mem>;
300 qcom,rpm-msg-ram = <&rpm_msg_ram>;
305 smp2p-hexagon {
313 qcom,local-pid = <0>;
314 qcom,remote-pid = <1>;
316 hexagon_smp2p_out: master-kernel {
317 qcom,entry-name = "master-kernel";
319 #qcom,smem-state-cells = <1>;
322 hexagon_smp2p_in: slave-kernel {
323 qcom,entry-name = "slave-kernel";
325 interrupt-controller;
326 #interrupt-cells = <2>;
330 smp2p-wcnss {
338 qcom,local-pid = <0>;
339 qcom,remote-pid = <4>;
341 wcnss_smp2p_out: master-kernel {
342 qcom,entry-name = "master-kernel";
344 #qcom,smem-state-cells = <1>;
347 wcnss_smp2p_in: slave-kernel {
348 qcom,entry-name = "slave-kernel";
350 interrupt-controller;
351 #interrupt-cells = <2>;
358 #address-cells = <1>;
359 #size-cells = <0>;
361 qcom,ipc-1 = <&apcs 8 13>;
362 qcom,ipc-3 = <&apcs 8 19>;
367 #qcom,smem-state-cells = <1>;
374 interrupt-controller;
375 #interrupt-cells = <2>;
382 interrupt-controller;
383 #interrupt-cells = <2>;
388 #address-cells = <1>;
389 #size-cells = <1>;
391 compatible = "simple-bus";
397 clock-names = "core";
408 #address-cells = <1>;
409 #size-cells = <1>;
419 compatible = "qcom,rpm-msg-ram";
424 compatible = "qcom,msm8916-bimc";
426 #interconnect-cells = <1>;
427 clock-names = "bus", "bus_a";
432 tsens: thermal-sensor@4a9000 {
433 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
436 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
437 nvmem-cell-names = "calib", "calib_sel";
440 interrupt-names = "uplow";
441 #thermal-sensor-cells = <1>;
445 compatible = "qcom,msm8916-pcnoc";
447 #interconnect-cells = <1>;
448 clock-names = "bus", "bus_a";
454 compatible = "qcom,msm8916-snoc";
456 #interconnect-cells = <1>;
457 clock-names = "bus", "bus_a";
463 /* CTI 0 - TMC connections */
465 compatible = "arm,coresight-cti", "arm,primecell";
469 clock-names = "apb_pclk";
474 /* CTI 1 - TPIU connections */
476 compatible = "arm,coresight-cti", "arm,primecell";
480 clock-names = "apb_pclk";
485 /* CTIs 2-11 - no information - not instantiated */
488 compatible = "arm,coresight-tpiu", "arm,primecell";
492 clock-names = "apb_pclk", "atclk";
496 in-ports {
499 remote-endpoint = <&replicator_out1>;
506 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
510 clock-names = "apb_pclk", "atclk";
514 in-ports {
515 #address-cells = <1>;
516 #size-cells = <0>;
520 * 0 - connected to Resource and Power Manger CPU ETM
521 * 1 - not-connected
522 * 2 - connected to Modem CPU ETM
523 * 3 - not-connected
524 * 5 - not-connected
525 * 6 - connected trought funnel to Wireless CPU ETM
526 * 7 - connected to STM component
532 remote-endpoint = <&funnel1_out>;
537 out-ports {
540 remote-endpoint = <&etf_in>;
547 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
551 clock-names = "apb_pclk", "atclk";
555 out-ports {
556 #address-cells = <1>;
557 #size-cells = <0>;
562 remote-endpoint = <&etr_in>;
568 remote-endpoint = <&tpiu_in>;
573 in-ports {
576 remote-endpoint = <&etf_out>;
583 compatible = "arm,coresight-tmc", "arm,primecell";
587 clock-names = "apb_pclk", "atclk";
591 in-ports {
594 remote-endpoint = <&funnel0_out>;
599 out-ports {
602 remote-endpoint = <&replicator_in>;
609 compatible = "arm,coresight-tmc", "arm,primecell";
613 clock-names = "apb_pclk", "atclk";
617 in-ports {
620 remote-endpoint = <&replicator_out0>;
627 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
631 clock-names = "apb_pclk", "atclk";
635 in-ports {
636 #address-cells = <1>;
637 #size-cells = <0>;
642 remote-endpoint = <&etm0_out>;
648 remote-endpoint = <&etm1_out>;
654 remote-endpoint = <&etm2_out>;
660 remote-endpoint = <&etm3_out>;
665 out-ports {
668 remote-endpoint = <&funnel0_in4>;
675 compatible = "arm,coresight-cpu-debug", "arm,primecell";
678 clock-names = "apb_pclk";
684 compatible = "arm,coresight-cpu-debug", "arm,primecell";
687 clock-names = "apb_pclk";
693 compatible = "arm,coresight-cpu-debug", "arm,primecell";
696 clock-names = "apb_pclk";
702 compatible = "arm,coresight-cpu-debug", "arm,primecell";
705 clock-names = "apb_pclk";
710 /* Core CTIs; CTIs 12-15 */
711 /* CTI - CPU-0 */
713 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
718 clock-names = "apb_pclk";
721 arm,cs-dev-assoc = <&etm0>;
726 /* CTI - CPU-1 */
728 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
733 clock-names = "apb_pclk";
736 arm,cs-dev-assoc = <&etm1>;
741 /* CTI - CPU-2 */
743 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
748 clock-names = "apb_pclk";
751 arm,cs-dev-assoc = <&etm2>;
756 /* CTI - CPU-3 */
758 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
763 clock-names = "apb_pclk";
766 arm,cs-dev-assoc = <&etm3>;
772 compatible = "arm,coresight-etm4x", "arm,primecell";
776 clock-names = "apb_pclk", "atclk";
777 arm,coresight-loses-context-with-cpu;
783 out-ports {
786 remote-endpoint = <&funnel1_in0>;
793 compatible = "arm,coresight-etm4x", "arm,primecell";
797 clock-names = "apb_pclk", "atclk";
798 arm,coresight-loses-context-with-cpu;
804 out-ports {
807 remote-endpoint = <&funnel1_in1>;
814 compatible = "arm,coresight-etm4x", "arm,primecell";
818 clock-names = "apb_pclk", "atclk";
819 arm,coresight-loses-context-with-cpu;
825 out-ports {
828 remote-endpoint = <&funnel1_in2>;
835 compatible = "arm,coresight-etm4x", "arm,primecell";
839 clock-names = "apb_pclk", "atclk";
840 arm,coresight-loses-context-with-cpu;
846 out-ports {
849 remote-endpoint = <&funnel1_in3>;
856 compatible = "qcom,msm8916-pinctrl";
859 gpio-controller;
860 gpio-ranges = <&msmgpio 0 0 122>;
861 #gpio-cells = <2>;
862 interrupt-controller;
863 #interrupt-cells = <2>;
866 gcc: clock-controller@1800000 {
867 compatible = "qcom,gcc-msm8916";
868 #clock-cells = <1>;
869 #reset-cells = <1>;
870 #power-domain-cells = <1>;
875 compatible = "qcom,tcsr-mutex";
877 #hwlock-cells = <1>;
881 compatible = "qcom,tcsr-msm8916", "syscon";
889 reg-names = "mdss_phys", "vbif_phys";
891 power-domains = <&gcc MDSS_GDSC>;
896 clock-names = "iface",
902 interrupt-controller;
903 #interrupt-cells = <1>;
905 #address-cells = <1>;
906 #size-cells = <1>;
912 reg-names = "mdp_phys";
914 interrupt-parent = <&mdss>;
921 clock-names = "iface",
929 #address-cells = <1>;
930 #size-cells = <0>;
935 remote-endpoint = <&dsi0_in>;
942 compatible = "qcom,mdss-dsi-ctrl";
944 reg-names = "dsi_ctrl";
946 interrupt-parent = <&mdss>;
949 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
951 assigned-clock-parents = <&dsi_phy0 0>,
960 clock-names = "mdp_core",
967 phy-names = "dsi-phy";
969 #address-cells = <1>;
970 #size-cells = <0>;
973 #address-cells = <1>;
974 #size-cells = <0>;
979 remote-endpoint = <&mdp5_intf1_out>;
991 dsi_phy0: dsi-phy@1a98300 {
992 compatible = "qcom,dsi-phy-28nm-lp";
996 reg-names = "dsi_pll",
1000 #clock-cells = <1>;
1001 #phy-cells = <0>;
1005 clock-names = "iface", "ref";
1010 compatible = "qcom,msm8916-camss";
1020 reg-names = "csiphy0",
1035 interrupt-names = "csiphy0",
1041 power-domains = <&gcc VFE_GDSC>;
1061 clock-names = "top_ahb",
1083 #address-cells = <1>;
1084 #size-cells = <0>;
1089 compatible = "qcom,msm8916-cci";
1090 #address-cells = <1>;
1091 #size-cells = <0>;
1098 clock-names = "camss_top_ahb", "cci_ahb",
1100 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1102 assigned-clock-rates = <80000000>, <19200000>;
1103 pinctrl-names = "default";
1104 pinctrl-0 = <&cci0_default>;
1107 cci_i2c0: i2c-bus@0 {
1109 clock-frequency = <400000>;
1110 #address-cells = <1>;
1111 #size-cells = <0>;
1116 compatible = "qcom,adreno-306.0", "qcom,adreno";
1118 reg-names = "kgsl_3d0_reg_memory";
1120 interrupt-names = "kgsl_3d0_irq";
1121 clock-names =
1135 power-domains = <&gcc OXILI_GDSC>;
1136 operating-points-v2 = <&gpu_opp_table>;
1139 gpu_opp_table: opp-table {
1140 compatible = "operating-points-v2";
1142 opp-400000000 {
1143 opp-hz = /bits/ 64 <400000000>;
1145 opp-19200000 {
1146 opp-hz = /bits/ 64 <19200000>;
1151 venus: video-codec@1d00000 {
1152 compatible = "qcom,msm8916-venus";
1155 power-domains = <&gcc VENUS_GDSC>;
1159 clock-names = "core", "iface", "bus";
1161 memory-region = <&venus_mem>;
1164 video-decoder {
1165 compatible = "venus-decoder";
1168 video-encoder {
1169 compatible = "venus-encoder";
1174 #address-cells = <1>;
1175 #size-cells = <1>;
1176 #iommu-cells = <1>;
1177 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1182 clock-names = "iface", "bus";
1183 qcom,iommu-secure-id = <17>;
1186 iommu-ctx@3000 {
1187 compatible = "qcom,msm-iommu-v1-sec";
1193 iommu-ctx@4000 {
1194 compatible = "qcom,msm-iommu-v1-ns";
1200 iommu-ctx@5000 {
1201 compatible = "qcom,msm-iommu-v1-sec";
1208 #address-cells = <1>;
1209 #size-cells = <1>;
1210 #iommu-cells = <1>;
1211 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1215 clock-names = "iface", "bus";
1216 qcom,iommu-secure-id = <18>;
1219 iommu-ctx@1000 {
1220 compatible = "qcom,msm-iommu-v1-ns";
1226 iommu-ctx@2000 {
1227 compatible = "qcom,msm-iommu-v1-ns";
1234 compatible = "qcom,spmi-pmic-arb";
1240 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1241 interrupt-names = "periph_irq";
1245 #address-cells = <2>;
1246 #size-cells = <0>;
1247 interrupt-controller;
1248 #interrupt-cells = <4>;
1252 compatible = "qcom,msm8916-mss-pil", "qcom,q6v5-pil";
1256 reg-names = "qdsp6", "rmb";
1258 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1263 interrupt-names = "wdog", "fatal", "ready",
1264 "handover", "stop-ack";
1270 clock-names = "iface", "bus", "mem", "xo";
1272 qcom,smem-states = <&hexagon_smp2p_out 0>;
1273 qcom,smem-state-names = "stop";
1276 reset-names = "mss_restart";
1278 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1283 memory-region = <&mba_mem>;
1287 memory-region = <&mpss_mem>;
1290 smd-edge {
1293 qcom,smd-edge = <0>;
1295 qcom,remote-pid = <1>;
1301 qcom,smd-channels = "fastrpcsmd-apps-dsp";
1304 #address-cells = <1>;
1305 #size-cells = <0>;
1308 compatible = "qcom,fastrpc-compute-cb";
1317 compatible = "qcom,apq8016-sbc-sndcard";
1319 reg-names = "mic-iomux", "spkr-iomux";
1322 lpass: audio-controller@7708000 {
1324 compatible = "qcom,lpass-cpu-apq8016";
1333 clock-names = "ahbix-clk",
1334 "pcnoc-mport-clk",
1335 "pcnoc-sway-clk",
1336 "mi2s-bit-clk0",
1337 "mi2s-bit-clk1",
1338 "mi2s-bit-clk2",
1339 "mi2s-bit-clk3";
1340 #sound-dai-cells = <1>;
1343 interrupt-names = "lpass-irq-lpaif";
1345 reg-names = "lpass-lpaif";
1347 #address-cells = <1>;
1348 #size-cells = <0>;
1351 lpass_codec: audio-codec@771c000 {
1352 compatible = "qcom,msm8916-wcd-digital-codec";
1356 clock-names = "ahbix-clk", "mclk";
1357 #sound-dai-cells = <1>;
1361 compatible = "qcom,sdhci-msm-v4";
1363 reg-names = "hc_mem", "core_mem";
1367 interrupt-names = "hc_irq", "pwr_irq";
1371 clock-names = "core", "iface", "xo";
1372 mmc-ddr-1_8v;
1373 bus-width = <8>;
1374 non-removable;
1379 compatible = "qcom,sdhci-msm-v4";
1381 reg-names = "hc_mem", "core_mem";
1385 interrupt-names = "hc_irq", "pwr_irq";
1389 clock-names = "core", "iface", "xo";
1390 bus-width = <4>;
1395 compatible = "qcom,bam-v1.7.0";
1399 clock-names = "bam_clk";
1400 #dma-cells = <1>;
1406 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
1410 clock-names = "core", "iface";
1412 dma-names = "rx", "tx";
1413 pinctrl-names = "default", "sleep";
1414 pinctrl-0 = <&blsp1_uart1_default>;
1415 pinctrl-1 = <&blsp1_uart1_sleep>;
1420 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
1424 clock-names = "core", "iface";
1426 dma-names = "rx", "tx";
1427 pinctrl-names = "default", "sleep";
1428 pinctrl-0 = <&blsp1_uart2_default>;
1429 pinctrl-1 = <&blsp1_uart2_sleep>;
1434 compatible = "qcom,i2c-qup-v2.2.1";
1439 clock-names = "iface", "core";
1440 pinctrl-names = "default", "sleep";
1441 pinctrl-0 = <&i2c1_default>;
1442 pinctrl-1 = <&i2c1_sleep>;
1443 #address-cells = <1>;
1444 #size-cells = <0>;
1449 compatible = "qcom,spi-qup-v2.2.1";
1454 clock-names = "core", "iface";
1456 dma-names = "rx", "tx";
1457 pinctrl-names = "default", "sleep";
1458 pinctrl-0 = <&spi1_default>;
1459 pinctrl-1 = <&spi1_sleep>;
1460 #address-cells = <1>;
1461 #size-cells = <0>;
1466 compatible = "qcom,i2c-qup-v2.2.1";
1471 clock-names = "iface", "core";
1472 pinctrl-names = "default", "sleep";
1473 pinctrl-0 = <&i2c2_default>;
1474 pinctrl-1 = <&i2c2_sleep>;
1475 #address-cells = <1>;
1476 #size-cells = <0>;
1481 compatible = "qcom,spi-qup-v2.2.1";
1486 clock-names = "core", "iface";
1488 dma-names = "rx", "tx";
1489 pinctrl-names = "default", "sleep";
1490 pinctrl-0 = <&spi2_default>;
1491 pinctrl-1 = <&spi2_sleep>;
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1498 compatible = "qcom,spi-qup-v2.2.1";
1503 clock-names = "core", "iface";
1505 dma-names = "rx", "tx";
1506 pinctrl-names = "default", "sleep";
1507 pinctrl-0 = <&spi3_default>;
1508 pinctrl-1 = <&spi3_sleep>;
1509 #address-cells = <1>;
1510 #size-cells = <0>;
1515 compatible = "qcom,i2c-qup-v2.2.1";
1520 clock-names = "iface", "core";
1521 pinctrl-names = "default", "sleep";
1522 pinctrl-0 = <&i2c4_default>;
1523 pinctrl-1 = <&i2c4_sleep>;
1524 #address-cells = <1>;
1525 #size-cells = <0>;
1530 compatible = "qcom,spi-qup-v2.2.1";
1535 clock-names = "core", "iface";
1537 dma-names = "rx", "tx";
1538 pinctrl-names = "default", "sleep";
1539 pinctrl-0 = <&spi4_default>;
1540 pinctrl-1 = <&spi4_sleep>;
1541 #address-cells = <1>;
1542 #size-cells = <0>;
1547 compatible = "qcom,i2c-qup-v2.2.1";
1552 clock-names = "iface", "core";
1553 pinctrl-names = "default", "sleep";
1554 pinctrl-0 = <&i2c5_default>;
1555 pinctrl-1 = <&i2c5_sleep>;
1556 #address-cells = <1>;
1557 #size-cells = <0>;
1562 compatible = "qcom,spi-qup-v2.2.1";
1567 clock-names = "core", "iface";
1569 dma-names = "rx", "tx";
1570 pinctrl-names = "default", "sleep";
1571 pinctrl-0 = <&spi5_default>;
1572 pinctrl-1 = <&spi5_sleep>;
1573 #address-cells = <1>;
1574 #size-cells = <0>;
1579 compatible = "qcom,i2c-qup-v2.2.1";
1584 clock-names = "iface", "core";
1585 pinctrl-names = "default", "sleep";
1586 pinctrl-0 = <&i2c6_default>;
1587 pinctrl-1 = <&i2c6_sleep>;
1588 #address-cells = <1>;
1589 #size-cells = <0>;
1594 compatible = "qcom,spi-qup-v2.2.1";
1599 clock-names = "core", "iface";
1601 dma-names = "rx", "tx";
1602 pinctrl-names = "default", "sleep";
1603 pinctrl-0 = <&spi6_default>;
1604 pinctrl-1 = <&spi6_sleep>;
1605 #address-cells = <1>;
1606 #size-cells = <0>;
1611 compatible = "qcom,ci-hdrc";
1618 clock-names = "iface", "core";
1619 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1620 assigned-clock-rates = <80000000>;
1622 reset-names = "core";
1625 hnp-disable;
1626 srp-disable;
1627 adp-disable;
1628 ahb-burst-config = <0>;
1629 phy-names = "usb-phy";
1632 #reset-cells = <1>;
1636 compatible = "qcom,usb-hs-phy-msm8916",
1637 "qcom,usb-hs-phy";
1638 #phy-cells = <0>;
1640 clock-names = "ref", "sleep";
1642 reset-names = "phy", "por";
1643 qcom,init-seq = /bits/ 8 <0x0 0x44
1650 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
1652 reg-names = "ccu", "dxe", "pmu";
1654 memory-region = <&wcnss_mem>;
1656 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
1661 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1664 qcom,state-names = "stop";
1666 pinctrl-names = "default";
1667 pinctrl-0 = <&wcnss_pin_a>;
1675 clock-names = "xo";
1678 smd-edge {
1682 qcom,smd-edge = <6>;
1683 qcom,remote-pid = <4>;
1689 qcom,smd-channels = "WCNSS_CTRL";
1694 compatible = "qcom,wcnss-bt";
1698 compatible = "qcom,wcnss-wlan";
1702 interrupt-names = "tx", "rx";
1704 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
1705 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
1711 intc: interrupt-controller@b000000 {
1712 compatible = "qcom,msm-qgic2";
1713 interrupt-controller;
1714 #interrupt-cells = <3>;
1719 compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
1721 #mbox-cells = <1>;
1723 clock-names = "pll", "aux";
1724 #clock-cells = <0>;
1728 compatible = "qcom,msm8916-a53pll";
1730 #clock-cells = <0>;
1734 #address-cells = <1>;
1735 #size-cells = <1>;
1737 compatible = "arm,armv7-timer-mem";
1739 clock-frequency = <19200000>;
1742 frame-number = <0>;
1750 frame-number = <1>;
1757 frame-number = <2>;
1764 frame-number = <3>;
1771 frame-number = <4>;
1778 frame-number = <5>;
1785 frame-number = <6>;
1793 thermal-zones {
1794 cpu0-1-thermal {
1795 polling-delay-passive = <250>;
1796 polling-delay = <1000>;
1798 thermal-sensors = <&tsens 5>;
1801 cpu0_1_alert0: trip-point0 {
1813 cooling-maps {
1816 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1824 cpu2-3-thermal {
1825 polling-delay-passive = <250>;
1826 polling-delay = <1000>;
1828 thermal-sensors = <&tsens 4>;
1831 cpu2_3_alert0: trip-point0 {
1843 cooling-maps {
1846 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1854 gpu-thermal {
1855 polling-delay-passive = <250>;
1856 polling-delay = <1000>;
1858 thermal-sensors = <&tsens 2>;
1861 gpu_alert0: trip-point0 {
1874 camera-thermal {
1875 polling-delay-passive = <250>;
1876 polling-delay = <1000>;
1878 thermal-sensors = <&tsens 1>;
1881 cam_alert0: trip-point0 {
1889 modem-thermal {
1890 polling-delay-passive = <250>;
1891 polling-delay = <1000>;
1893 thermal-sensors = <&tsens 0>;
1896 modem_alert0: trip-point0 {
1907 compatible = "arm,armv8-timer";
1915 #include "msm8916-pins.dtsi"