Lines Matching +full:0 +full:xff000
30 reg = <0 0 0 0>;
39 reg = <0x0 0x86000000 0x0 0x300000>;
44 reg = <0x0 0x86300000 0x0 0x100000>;
49 reg = <0x0 0x86400000 0x0 0x100000>;
54 reg = <0x0 0x86500000 0x0 0x180000>;
59 reg = <0x0 0x86680000 0x0 0x80000>;
65 reg = <0x0 0x86700000 0x0 0xe0000>;
72 reg = <0x0 0x867e0000 0x0 0x20000>;
77 reg = <0x0 0x86800000 0x0 0x2b00000>;
82 reg = <0x0 0x89300000 0x0 0x600000>;
87 reg = <0x0 0x89900000 0x0 0x600000>;
93 reg = <0 0x8ea00000 0 0x100000>;
100 #clock-cells = <0>;
106 #clock-cells = <0>;
113 #size-cells = <0>;
115 CPU0: cpu@0 {
118 reg = <0x0>;
131 reg = <0x1>;
144 reg = <0x2>;
157 reg = <0x3>;
175 CPU_SLEEP_0: cpu-sleep-0 {
178 arm,psci-suspend-param = <0x40000002>;
190 arm,psci-suspend-param = <0x41000012>;
198 arm,psci-suspend-param = <0x41000032>;
233 qcom,dload-mode = <&tcsr 0x6100>;
247 #power-domain-cells = <0>;
253 #power-domain-cells = <0>;
259 #power-domain-cells = <0>;
265 #power-domain-cells = <0>;
271 #power-domain-cells = <0>;
281 qcom,ipc = <&apcs 8 0>;
313 qcom,local-pid = <0>;
338 qcom,local-pid = <0>;
359 #size-cells = <0>;
364 apps_smsm: apps@0 {
365 reg = <0>;
390 ranges = <0 0 0 0xffffffff>;
395 reg = <0x00022000 0x200>;
402 reg = <0x004ab000 0x4>;
407 reg = <0x0005c000 0x1000>;
411 reg = <0xd0 0x8>;
414 reg = <0xec 0x4>;
420 reg = <0x00060000 0x8000>;
425 reg = <0x00400000 0x62000>;
434 reg = <0x004a9000 0x1000>, /* TM */
435 <0x004a8000 0x1000>; /* SROT */
446 reg = <0x00500000 0x11000>;
455 reg = <0x00580000 0x14000>;
463 /* CTI 0 - TMC connections */
466 reg = <0x00810000 0x1000>;
477 reg = <0x00811000 0x1000>;
489 reg = <0x00820000 0x1000>;
507 reg = <0x00821000 0x1000>;
516 #size-cells = <0>;
520 * 0 - connected to Resource and Power Manger CPU ETM
548 reg = <0x00824000 0x1000>;
557 #size-cells = <0>;
559 port@0 {
560 reg = <0>;
584 reg = <0x00825000 0x1000>;
610 reg = <0x00826000 0x1000>;
628 reg = <0x00841000 0x1000>;
637 #size-cells = <0>;
639 port@0 {
640 reg = <0>;
676 reg = <0x00850000 0x1000>;
685 reg = <0x00852000 0x1000>;
694 reg = <0x00854000 0x1000>;
703 reg = <0x00856000 0x1000>;
711 /* CTI - CPU-0 */
715 reg = <0x00858000 0x1000>;
730 reg = <0x00859000 0x1000>;
745 reg = <0x0085a000 0x1000>;
760 reg = <0x0085b000 0x1000>;
773 reg = <0x0085c000 0x1000>;
794 reg = <0x0085d000 0x1000>;
815 reg = <0x0085e000 0x1000>;
836 reg = <0x0085f000 0x1000>;
857 reg = <0x01000000 0x300000>;
860 gpio-ranges = <&msmgpio 0 0 122>;
871 reg = <0x01800000 0x80000>;
876 reg = <0x01905000 0x20000>;
882 reg = <0x01937000 0x30000>;
887 reg = <0x01a00000 0x1000>,
888 <0x01ac8000 0x3000>;
911 reg = <0x01a01000 0x89000>;
915 interrupts = <0>;
930 #size-cells = <0>;
932 port@0 {
933 reg = <0>;
943 reg = <0x01a98000 0x25c>;
951 assigned-clock-parents = <&dsi_phy0 0>,
970 #size-cells = <0>;
974 #size-cells = <0>;
976 port@0 {
977 reg = <0>;
993 reg = <0x01a98300 0xd4>,
994 <0x01a98500 0x280>,
995 <0x01a98780 0x30>;
1001 #phy-cells = <0>;
1011 reg = <0x01b0ac00 0x200>,
1012 <0x01b00030 0x4>,
1013 <0x01b0b000 0x200>,
1014 <0x01b00038 0x4>,
1015 <0x01b08000 0x100>,
1016 <0x01b08400 0x100>,
1017 <0x01b0a000 0x500>,
1018 <0x01b00020 0x10>,
1019 <0x01b10000 0x1000>;
1084 #size-cells = <0>;
1091 #size-cells = <0>;
1092 reg = <0x01b0c000 0x1000>;
1104 pinctrl-0 = <&cci0_default>;
1107 cci_i2c0: i2c-bus@0 {
1108 reg = <0>;
1111 #size-cells = <0>;
1117 reg = <0x01c00000 0x20000>;
1153 reg = <0x01d00000 0xff000>;
1178 ranges = <0 0x01e20000 0x40000>;
1179 reg = <0x01ef0000 0x3000>;
1188 reg = <0x3000 0x1000>;
1195 reg = <0x4000 0x1000>;
1202 reg = <0x5000 0x1000>;
1212 ranges = <0 0x01f08000 0x10000>;
1221 reg = <0x1000 0x1000>;
1228 reg = <0x2000 0x1000>;
1235 reg = <0x0200f000 0x001000>,
1236 <0x02400000 0x400000>,
1237 <0x02c00000 0x400000>,
1238 <0x03800000 0x200000>,
1239 <0x0200a000 0x002100>;
1243 qcom,ee = <0>;
1244 qcom,channel = <0>;
1246 #size-cells = <0>;
1253 reg = <0x04080000 0x100>,
1254 <0x04020000 0x040>;
1259 <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
1272 qcom,smem-states = <&hexagon_smp2p_out 0>;
1275 resets = <&scm 0>;
1278 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1293 qcom,smd-edge = <0>;
1305 #size-cells = <0>;
1318 reg = <0x07702000 0x4>, <0x07702004 0x4>;
1344 reg = <0x07708000 0x10000>;
1348 #size-cells = <0>;
1353 reg = <0x0771c000 0x400>;
1362 reg = <0x07824900 0x11c>, <0x07824000 0x800>;
1380 reg = <0x07864900 0x11c>, <0x07864000 0x800>;
1396 reg = <0x07884000 0x23000>;
1401 qcom,ee = <0>;
1407 reg = <0x078af000 0x200>;
1411 dmas = <&blsp_dma 1>, <&blsp_dma 0>;
1414 pinctrl-0 = <&blsp1_uart1_default>;
1421 reg = <0x078b0000 0x200>;
1428 pinctrl-0 = <&blsp1_uart2_default>;
1435 reg = <0x078b5000 0x500>;
1441 pinctrl-0 = <&i2c1_default>;
1444 #size-cells = <0>;
1450 reg = <0x078b5000 0x500>;
1458 pinctrl-0 = <&spi1_default>;
1461 #size-cells = <0>;
1467 reg = <0x078b6000 0x500>;
1473 pinctrl-0 = <&i2c2_default>;
1476 #size-cells = <0>;
1482 reg = <0x078b6000 0x500>;
1490 pinctrl-0 = <&spi2_default>;
1493 #size-cells = <0>;
1499 reg = <0x078b7000 0x500>;
1507 pinctrl-0 = <&spi3_default>;
1510 #size-cells = <0>;
1516 reg = <0x078b8000 0x500>;
1522 pinctrl-0 = <&i2c4_default>;
1525 #size-cells = <0>;
1531 reg = <0x078b8000 0x500>;
1539 pinctrl-0 = <&spi4_default>;
1542 #size-cells = <0>;
1548 reg = <0x078b9000 0x500>;
1554 pinctrl-0 = <&i2c5_default>;
1557 #size-cells = <0>;
1563 reg = <0x078b9000 0x500>;
1571 pinctrl-0 = <&spi5_default>;
1574 #size-cells = <0>;
1580 reg = <0x078ba000 0x500>;
1586 pinctrl-0 = <&i2c6_default>;
1589 #size-cells = <0>;
1595 reg = <0x078ba000 0x500>;
1603 pinctrl-0 = <&spi6_default>;
1606 #size-cells = <0>;
1612 reg = <0x078d9000 0x200>,
1613 <0x078d9200 0x200>;
1628 ahb-burst-config = <0>;
1638 #phy-cells = <0>;
1641 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
1643 qcom,init-seq = /bits/ 8 <0x0 0x44
1644 0x1 0x6b 0x2 0x24 0x3 0x13>;
1651 reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
1657 <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
1663 qcom,state = <&wcnss_smp2p_out 0>;
1667 pinctrl-0 = <&wcnss_pin_a>;
1715 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
1720 reg = <0x0b011000 0x1000>;
1724 #clock-cells = <0>;
1729 reg = <0x0b016000 0x40>;
1730 #clock-cells = <0>;
1738 reg = <0x0b020000 0x1000>;
1742 frame-number = <0>;
1745 reg = <0x0b021000 0x1000>,
1746 <0x0b022000 0x1000>;
1752 reg = <0x0b023000 0x1000>;
1759 reg = <0x0b024000 0x1000>;
1766 reg = <0x0b025000 0x1000>;
1773 reg = <0x0b026000 0x1000>;
1780 reg = <0x0b027000 0x1000>;
1787 reg = <0x0b028000 0x1000>;
1893 thermal-sensors = <&tsens 0>;