Lines Matching +full:0 +full:x50000
14 bus@0 {
19 ranges = <0x0 0x0 0x0 0x40000000>;
23 reg = <0x00100000 0xf000>,
24 <0x0010f000 0x1000>;
30 reg = <0x03100000 0x10000>;
41 reg = <0x03460000 0x20000>;
53 reg = <0x03810000 0x10000>;
60 reg = <0x03c00000 0xa0000>;
78 reg = <0x0c150000 0x90000>;
84 * Shared interrupt 0 is routed only to AON/SPE, so
93 reg = <0x0c2a0000 0x10000>;
101 reg = <0x0c360000 0x10000>,
102 <0x0c370000 0x10000>,
103 <0x0c380000 0x10000>,
104 <0x0c390000 0x10000>,
105 <0x0c3a0000 0x10000>;
114 reg = <0x0f400000 0x010000>, /* GICD */
115 <0x0f440000 0x200000>; /* GICR */
127 reg = <0x0 0x40000000 0x0 0x50000>;
130 ranges = <0x0 0x0 0x40000000 0x50000>;
133 reg = <0x4e000 0x1000>;
139 reg = <0x4f000 0x1000>;
158 #size-cells = <0>;
164 #size-cells = <0>;
166 cpu@0 {
168 reg = <0x000>;