Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
13 interrupt-parent = <&lic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "nvidia,tegra124-pcie";
20 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
23 reg-names = "pads", "afi", "cs";
26 interrupt-names = "intr", "msi";
28 #interrupt-cells = <1>;
29 interrupt-map-mask = <0 0 0 0>;
30 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
32 bus-range = <0x00 0xff>;
33 #address-cells = <3>;
34 #size-cells = <2>;
39 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
46 clock-names = "pex", "afi", "pll_e", "cml";
50 reset-names = "pex", "afi", "pcie_x";
55 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
56 reg = <0x000800 0 0 0 0>;
57 bus-range = <0x00 0xff>;
60 #address-cells = <3>;
61 #size-cells = <2>;
64 nvidia,num-lanes = <2>;
69 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
70 reg = <0x001000 0 0 0 0>;
71 bus-range = <0x00 0xff>;
74 #address-cells = <3>;
75 #size-cells = <2>;
78 nvidia,num-lanes = <1>;
83 compatible = "nvidia,tegra132-host1x",
84 "nvidia,tegra124-host1x";
85 reg = <0x0 0x50000000 0x0 0x00034000>;
88 interrupt-names = "syncpt", "host1x";
90 clock-names = "host1x";
92 reset-names = "host1x";
94 #address-cells = <2>;
95 #size-cells = <2>;
100 compatible = "nvidia,tegra124-dc";
101 reg = <0x0 0x54200000 0x0 0x00040000>;
104 clock-names = "dc";
106 reset-names = "dc";
114 compatible = "nvidia,tegra124-dc";
115 reg = <0x0 0x54240000 0x0 0x00040000>;
118 clock-names = "dc";
120 reset-names = "dc";
128 compatible = "nvidia,tegra124-hdmi";
129 reg = <0x0 0x54280000 0x0 0x00040000>;
133 clock-names = "hdmi", "parent";
135 reset-names = "hdmi";
140 compatible = "nvidia,tegra124-sor";
141 reg = <0x0 0x54540000 0x0 0x00040000>;
148 clock-names = "sor", "out", "parent", "dp", "safe";
150 reset-names = "sor";
155 compatible = "nvidia,tegra124-dpaux";
156 reg = <0x0 0x545c0000 0x0 0x00040000>;
160 clock-names = "dpaux", "parent";
162 reset-names = "dpaux";
165 i2c-bus {
166 #address-cells = <1>;
167 #size-cells = <0>;
172 gic: interrupt-controller@50041000 {
173 compatible = "arm,cortex-a15-gic";
174 #interrupt-cells = <3>;
175 interrupt-controller;
176 reg = <0x0 0x50041000 0x0 0x1000>,
182 interrupt-parent = <&gic>;
187 reg = <0x0 0x57000000 0x0 0x01000000>,
191 interrupt-names = "stall", "nonstall";
194 clock-names = "gpu", "pwr";
196 reset-names = "gpu";
200 lic: interrupt-controller@60004000 {
201 compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
202 reg = <0x0 0x60004000 0x0 0x100>,
207 interrupt-controller;
208 #interrupt-cells = <3>;
209 interrupt-parent = <&gic>;
213 compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
214 reg = <0x0 0x60005000 0x0 0x400>;
222 clock-names = "timer";
226 compatible = "nvidia,tegra132-car";
227 reg = <0x0 0x60006000 0x0 0x1000>;
228 #clock-cells = <1>;
229 #reset-cells = <1>;
230 nvidia,external-memory-controller = <&emc>;
233 flow-controller@60007000 {
234 compatible = "nvidia,tegra132-flowctrl", "nvidia,tegra124-flowctrl";
235 reg = <0x0 0x60007000 0x0 0x1000>;
239 compatible = "nvidia,tegra124-actmon";
240 reg = <0x0 0x6000c800 0x0 0x400>;
244 clock-names = "actmon", "emc";
246 reset-names = "actmon";
250 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
251 reg = <0x0 0x6000d000 0x0 0x1000>;
260 #gpio-cells = <2>;
261 gpio-controller;
262 #interrupt-cells = <2>;
263 interrupt-controller;
267 compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
268 reg = <0x0 0x60020000 0x0 0x1400>;
302 clock-names = "dma";
304 reset-names = "dma";
305 #dma-cells = <1>;
309 compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
310 reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */
315 compatible = "nvidia,tegra124-pinmux";
316 reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */
325 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
327 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
330 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
331 reg = <0x0 0x70006000 0x0 0x40>;
332 reg-shift = <2>;
335 clock-names = "serial";
337 reset-names = "serial";
339 dma-names = "rx", "tx";
344 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
345 reg = <0x0 0x70006040 0x0 0x40>;
346 reg-shift = <2>;
349 clock-names = "serial";
351 reset-names = "serial";
353 dma-names = "rx", "tx";
358 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
359 reg = <0x0 0x70006200 0x0 0x40>;
360 reg-shift = <2>;
363 clock-names = "serial";
365 reset-names = "serial";
367 dma-names = "rx", "tx";
372 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
373 reg = <0x0 0x70006300 0x0 0x40>;
374 reg-shift = <2>;
377 clock-names = "serial";
379 reset-names = "serial";
381 dma-names = "rx", "tx";
386 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
387 reg = <0x0 0x7000a000 0x0 0x100>;
388 #pwm-cells = <2>;
390 clock-names = "pwm";
392 reset-names = "pwm";
397 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
398 reg = <0x0 0x7000c000 0x0 0x100>;
400 #address-cells = <1>;
401 #size-cells = <0>;
403 clock-names = "div-clk";
405 reset-names = "i2c";
407 dma-names = "rx", "tx";
412 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
413 reg = <0x0 0x7000c400 0x0 0x100>;
415 #address-cells = <1>;
416 #size-cells = <0>;
418 clock-names = "div-clk";
420 reset-names = "i2c";
422 dma-names = "rx", "tx";
427 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
428 reg = <0x0 0x7000c500 0x0 0x100>;
430 #address-cells = <1>;
431 #size-cells = <0>;
433 clock-names = "div-clk";
435 reset-names = "i2c";
437 dma-names = "rx", "tx";
442 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
443 reg = <0x0 0x7000c700 0x0 0x100>;
445 #address-cells = <1>;
446 #size-cells = <0>;
448 clock-names = "div-clk";
450 reset-names = "i2c";
452 dma-names = "rx", "tx";
457 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
458 reg = <0x0 0x7000d000 0x0 0x100>;
460 #address-cells = <1>;
461 #size-cells = <0>;
463 clock-names = "div-clk";
465 reset-names = "i2c";
467 dma-names = "rx", "tx";
472 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
473 reg = <0x0 0x7000d100 0x0 0x100>;
475 #address-cells = <1>;
476 #size-cells = <0>;
478 clock-names = "div-clk";
480 reset-names = "i2c";
482 dma-names = "rx", "tx";
487 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
488 reg = <0x0 0x7000d400 0x0 0x200>;
490 #address-cells = <1>;
491 #size-cells = <0>;
493 clock-names = "spi";
495 reset-names = "spi";
497 dma-names = "rx", "tx";
502 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
503 reg = <0x0 0x7000d600 0x0 0x200>;
505 #address-cells = <1>;
506 #size-cells = <0>;
508 clock-names = "spi";
510 reset-names = "spi";
512 dma-names = "rx", "tx";
517 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
518 reg = <0x0 0x7000d800 0x0 0x200>;
520 #address-cells = <1>;
521 #size-cells = <0>;
523 clock-names = "spi";
525 reset-names = "spi";
527 dma-names = "rx", "tx";
532 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
533 reg = <0x0 0x7000da00 0x0 0x200>;
535 #address-cells = <1>;
536 #size-cells = <0>;
538 clock-names = "spi";
540 reset-names = "spi";
542 dma-names = "rx", "tx";
547 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
548 reg = <0x0 0x7000dc00 0x0 0x200>;
550 #address-cells = <1>;
551 #size-cells = <0>;
553 clock-names = "spi";
555 reset-names = "spi";
557 dma-names = "rx", "tx";
562 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
563 reg = <0x0 0x7000de00 0x0 0x200>;
565 #address-cells = <1>;
566 #size-cells = <0>;
568 clock-names = "spi";
570 reset-names = "spi";
572 dma-names = "rx", "tx";
577 compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
578 reg = <0x0 0x7000e000 0x0 0x100>;
581 clock-names = "rtc";
585 compatible = "nvidia,tegra124-pmc";
586 reg = <0x0 0x7000e400 0x0 0x400>;
588 clock-names = "pclk", "clk32k_in";
589 #clock-cells = <1>;
593 compatible = "nvidia,tegra124-efuse";
594 reg = <0x0 0x7000f800 0x0 0x400>;
596 clock-names = "fuse";
598 reset-names = "fuse";
601 mc: memory-controller@70019000 {
602 compatible = "nvidia,tegra132-mc";
603 reg = <0x0 0x70019000 0x0 0x1000>;
605 clock-names = "mc";
609 #iommu-cells = <1>;
612 emc: external-memory-controller@7001b000 {
613 compatible = "nvidia,tegra132-emc";
614 reg = <0x0 0x7001b000 0x0 0x1000>;
616 clock-names = "emc";
618 nvidia,memory-controller = <&mc>;
622 compatible = "nvidia,tegra124-ahci";
623 reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
630 clock-names = "sata", "sata-oob", "cml1", "pll_e";
634 reset-names = "sata", "sata-oob", "sata-cold";
639 compatible = "nvidia,tegra132-hda", "nvidia,tegra124-hda",
640 "nvidia,tegra30-hda";
641 reg = <0x0 0x70030000 0x0 0x10000>;
646 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
650 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
655 compatible = "nvidia,tegra132-xusb", "nvidia,tegra124-xusb";
656 reg = <0x0 0x70090000 0x0 0x8000>,
659 reg-names = "hcd", "fpci", "ipfs";
675 clock-names = "xusb_host", "xusb_host_src",
682 reset-names = "xusb_host", "xusb_ss", "xusb_src";
684 nvidia,xusb-padctl = <&padctl>;
690 compatible = "nvidia,tegra132-xusb-padctl",
691 "nvidia,tegra124-xusb-padctl";
692 reg = <0x0 0x7009f000 0x0 0x1000>;
694 reset-names = "padctl";
701 usb2-0 {
703 #phy-cells = <0>;
706 usb2-1 {
708 #phy-cells = <0>;
711 usb2-2 {
713 #phy-cells = <0>;
722 ulpi-0 {
724 #phy-cells = <0>;
733 hsic-0 {
735 #phy-cells = <0>;
738 hsic-1 {
740 #phy-cells = <0>;
749 pcie-0 {
751 #phy-cells = <0>;
754 pcie-1 {
756 #phy-cells = <0>;
759 pcie-2 {
761 #phy-cells = <0>;
764 pcie-3 {
766 #phy-cells = <0>;
769 pcie-4 {
771 #phy-cells = <0>;
780 sata-0 {
782 #phy-cells = <0>;
789 usb2-0 {
793 usb2-1 {
797 usb2-2 {
801 hsic-0 {
805 hsic-1 {
809 usb3-0 {
813 usb3-1 {
820 compatible = "nvidia,tegra124-sdhci";
821 reg = <0x0 0x700b0000 0x0 0x200>;
824 clock-names = "sdhci";
826 reset-names = "sdhci";
831 compatible = "nvidia,tegra124-sdhci";
832 reg = <0x0 0x700b0200 0x0 0x200>;
835 clock-names = "sdhci";
837 reset-names = "sdhci";
842 compatible = "nvidia,tegra124-sdhci";
843 reg = <0x0 0x700b0400 0x0 0x200>;
846 clock-names = "sdhci";
848 reset-names = "sdhci";
853 compatible = "nvidia,tegra124-sdhci";
854 reg = <0x0 0x700b0600 0x0 0x200>;
857 clock-names = "sdhci";
859 reset-names = "sdhci";
863 soctherm: thermal-sensor@700e2000 {
864 compatible = "nvidia,tegra132-soctherm";
865 reg = <0x0 0x700e2000 0x0 0x600>, /* 0: SOC_THERM reg_base */
867 reg-names = "soctherm-reg", "ccroc-reg";
871 clock-names = "tsensor", "soctherm";
873 reset-names = "soctherm";
874 #thermal-sensor-cells = <1>;
876 throttle-cfgs {
879 nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
881 #cooling-cells = <2>;
886 thermal-zones {
888 polling-delay-passive = <1000>;
889 polling-delay = <0>;
891 thermal-sensors =
901 cpu_throttle_trip: throttle-trip {
908 cooling-maps {
911 cooling-device = <&throttle_heavy 1 1>;
916 polling-delay-passive = <0>;
917 polling-delay = <0>;
919 thermal-sensors =
930 cooling-maps {
938 polling-delay-passive = <1000>;
939 polling-delay = <0>;
941 thermal-sensors =
951 gpu_throttle_trip: throttle-trip {
958 cooling-maps {
961 cooling-device = <&throttle_heavy 1 1>;
966 polling-delay-passive = <0>;
967 polling-delay = <0>;
969 thermal-sensors =
980 cooling-maps {
990 compatible = "nvidia,tegra124-ahub";
991 reg = <0x0 0x70300000 0x0 0x200>,
997 clock-names = "d_audio", "apbif";
1019 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
1033 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
1038 #address-cells = <2>;
1039 #size-cells = <2>;
1042 compatible = "nvidia,tegra124-i2s";
1043 reg = <0x0 0x70301000 0x0 0x100>;
1044 nvidia,ahub-cif-ids = <4 4>;
1046 clock-names = "i2s";
1048 reset-names = "i2s";
1053 compatible = "nvidia,tegra124-i2s";
1054 reg = <0x0 0x70301100 0x0 0x100>;
1055 nvidia,ahub-cif-ids = <5 5>;
1057 clock-names = "i2s";
1059 reset-names = "i2s";
1064 compatible = "nvidia,tegra124-i2s";
1065 reg = <0x0 0x70301200 0x0 0x100>;
1066 nvidia,ahub-cif-ids = <6 6>;
1068 clock-names = "i2s";
1070 reset-names = "i2s";
1075 compatible = "nvidia,tegra124-i2s";
1076 reg = <0x0 0x70301300 0x0 0x100>;
1077 nvidia,ahub-cif-ids = <7 7>;
1079 clock-names = "i2s";
1081 reset-names = "i2s";
1086 compatible = "nvidia,tegra124-i2s";
1087 reg = <0x0 0x70301400 0x0 0x100>;
1088 nvidia,ahub-cif-ids = <8 8>;
1090 clock-names = "i2s";
1092 reset-names = "i2s";
1098 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
1099 reg = <0x0 0x7d000000 0x0 0x4000>;
1103 clock-names = "usb";
1105 reset-names = "usb";
1110 phy1: usb-phy@7d000000 {
1111 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1112 reg = <0x0 0x7d000000 0x0 0x4000>,
1118 clock-names = "reg", "pll_u", "utmi-pads";
1120 reset-names = "usb", "utmi-pads";
1121 #phy-cells = <0>;
1122 nvidia,hssync-start-delay = <0>;
1123 nvidia,idle-wait-delay = <17>;
1124 nvidia,elastic-limit = <16>;
1125 nvidia,term-range-adj = <6>;
1126 nvidia,xcvr-setup = <9>;
1127 nvidia,xcvr-lsfslew = <0>;
1128 nvidia,xcvr-lsrslew = <3>;
1129 nvidia,hssquelch-level = <2>;
1130 nvidia,hsdiscon-level = <5>;
1131 nvidia,xcvr-hsslew = <12>;
1132 nvidia,has-utmi-pad-registers;
1137 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
1138 reg = <0x0 0x7d004000 0x0 0x4000>;
1142 clock-names = "usb";
1144 reset-names = "usb";
1149 phy2: usb-phy@7d004000 {
1150 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1151 reg = <0x0 0x7d004000 0x0 0x4000>,
1157 clock-names = "reg", "pll_u", "utmi-pads";
1159 reset-names = "usb", "utmi-pads";
1160 #phy-cells = <0>;
1161 nvidia,hssync-start-delay = <0>;
1162 nvidia,idle-wait-delay = <17>;
1163 nvidia,elastic-limit = <16>;
1164 nvidia,term-range-adj = <6>;
1165 nvidia,xcvr-setup = <9>;
1166 nvidia,xcvr-lsfslew = <0>;
1167 nvidia,xcvr-lsrslew = <3>;
1168 nvidia,hssquelch-level = <2>;
1169 nvidia,hsdiscon-level = <5>;
1170 nvidia,xcvr-hsslew = <12>;
1175 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
1176 reg = <0x0 0x7d008000 0x0 0x4000>;
1180 clock-names = "usb";
1182 reset-names = "usb";
1187 phy3: usb-phy@7d008000 {
1188 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1189 reg = <0x0 0x7d008000 0x0 0x4000>,
1195 clock-names = "reg", "pll_u", "utmi-pads";
1197 reset-names = "usb", "utmi-pads";
1198 #phy-cells = <0>;
1199 nvidia,hssync-start-delay = <0>;
1200 nvidia,idle-wait-delay = <17>;
1201 nvidia,elastic-limit = <16>;
1202 nvidia,term-range-adj = <6>;
1203 nvidia,xcvr-setup = <9>;
1204 nvidia,xcvr-lsfslew = <0>;
1205 nvidia,xcvr-lsrslew = <3>;
1206 nvidia,hssquelch-level = <2>;
1207 nvidia,hsdiscon-level = <5>;
1208 nvidia,xcvr-hsslew = <12>;
1213 #address-cells = <1>;
1214 #size-cells = <0>;
1219 reg = <0>;
1225 reg = <1>;
1230 compatible = "arm,armv7-timer";
1239 interrupt-parent = <&gic>;