Lines Matching +full:gic +full:- +full:v3 +full:- +full:its
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <2>;
28 #size-cells = <0>;
29 cpu-map {
40 compatible = "arm,cortex-a53";
43 enable-method = "psci";
44 next-level-cache = <&L2_0>;
47 compatible = "arm,cortex-a53";
50 enable-method = "psci";
51 next-level-cache = <&L2_0>;
53 L2_0: l2-cache0 {
58 arm-pmu {
59 compatible = "arm,cortex-a53-pmu";
61 interrupt-affinity = <&cpu0>, <&cpu1>;
65 compatible = "arm,psci-0.2";
70 compatible = "arm,armv8-timer";
77 lcpll_clk: lcpll-clk {
78 compatible = "fixed-clock";
79 #clock-cells = <0>;
80 clock-frequency = <2500000000>;
83 clks: clock-controller@61110000c {
84 compatible = "microchip,sparx5-dpll";
85 #clock-cells = <1>;
90 ahb_clk: ahb-clk {
91 compatible = "fixed-clock";
92 #clock-cells = <0>;
93 clock-frequency = <250000000>;
96 sys_clk: sys-clk {
97 compatible = "fixed-clock";
98 #clock-cells = <0>;
99 clock-frequency = <625000000>;
103 compatible = "simple-bus";
104 #address-cells = <2>;
105 #size-cells = <1>;
108 gic: interrupt-controller@600300000 { label
109 compatible = "arm,gic-v3";
110 #interrupt-cells = <3>;
111 #address-cells = <2>;
112 #size-cells = <2>;
113 interrupt-controller;
114 reg = <0x6 0x00300000 0x10000>, /* GIC Dist */
123 compatible = "microchip,sparx5-cpu-syscon", "syscon",
124 "simple-mfd";
126 mux: mux-controller {
127 compatible = "mmio-mux";
128 #mux-control-cells = <0>;
131 * SPI: value 9 - (SIMC,SIBM) = 0b1001
132 * SPI2: value 6 - (SIBM,SIMC) = 0b0110
134 mux-reg-masks = <0x88 0xf0>;
139 pinctrl-0 = <&uart_pins>;
140 pinctrl-names = "default";
144 reg-io-width = <4>;
145 reg-shift = <2>;
152 pinctrl-0 = <&uart2_pins>;
153 pinctrl-names = "default";
157 reg-io-width = <4>;
158 reg-shift = <2>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 compatible = "microchip,sparx5-spi";
169 num-cs = <16>;
170 reg-io-width = <4>;
171 reg-shift = <2>;
178 compatible = "snps,dw-apb-timer";
181 clock-names = "timer";
186 compatible = "microchip,dw-sparx5-sdhci";
189 pinctrl-0 = <&emmc_pins>;
190 pinctrl-names = "default";
192 clock-names = "core";
193 assigned-clocks = <&clks CLK_ID_AUX1>;
194 assigned-clock-rates = <800000000>;
196 bus-width = <8>;
200 compatible = "microchip,sparx5-pinctrl";
202 gpio-controller;
203 #gpio-cells = <2>;
204 gpio-ranges = <&gpio 0 0 64>;
205 interrupt-controller;
207 #interrupt-cells = <2>;
209 cs1_pins: cs1-pins {
214 cs2_pins: cs2-pins {
219 cs3_pins: cs3-pins {
224 si2_pins: si2-pins {
229 uart_pins: uart-pins {
234 uart2_pins: uart2-pins {
239 i2c_pins: i2c-pins {
244 i2c2_pins: i2c2-pins {
249 emmc_pins: emmc-pins {
260 compatible = "snps,designware-i2c";
262 pinctrl-0 = <&i2c_pins>;
263 pinctrl-names = "default";
265 #address-cells = <1>;
266 #size-cells = <0>;
268 i2c-sda-hold-time-ns = <300>;
269 clock-frequency = <100000>;
274 compatible = "snps,designware-i2c";
276 pinctrl-0 = <&i2c2_pins>;
277 pinctrl-names = "default";
279 #address-cells = <1>;
280 #size-cells = <0>;
282 i2c-sda-hold-time-ns = <300>;
283 clock-frequency = <100000>;
288 compatible = "microchip,sparx5-temp";
290 #thermal-sensor-cells = <0>;