Lines Matching full:pericfg
369 pericfg: power-controller@10003000 { label
370 compatible = "mediatek,mt8173-pericfg", "syscon";
604 clocks = <&pericfg CLK_PERI_AUXADC>;
614 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
624 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
634 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
644 clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
655 clocks = <&pericfg CLK_PERI_I2C0>,
656 <&pericfg CLK_PERI_AP_DMA>;
671 clocks = <&pericfg CLK_PERI_I2C1>,
672 <&pericfg CLK_PERI_AP_DMA>;
687 clocks = <&pericfg CLK_PERI_I2C2>,
688 <&pericfg CLK_PERI_AP_DMA>;
705 <&pericfg CLK_PERI_SPI0>;
715 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
717 resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
727 clocks = <&pericfg CLK_PERI_SPI>,
741 clocks = <&pericfg CLK_PERI_I2C3>,
742 <&pericfg CLK_PERI_AP_DMA>;
757 clocks = <&pericfg CLK_PERI_I2C4>,
758 <&pericfg CLK_PERI_AP_DMA>;
771 clocks = <&pericfg CLK_PERI_I2C5>;
781 clocks = <&pericfg CLK_PERI_I2C6>,
782 <&pericfg CLK_PERI_AP_DMA>;
826 clocks = <&pericfg CLK_PERI_MSDC30_0>,
836 clocks = <&pericfg CLK_PERI_MSDC30_1>,
846 clocks = <&pericfg CLK_PERI_MSDC30_2>,
856 clocks = <&pericfg CLK_PERI_MSDC30_3>,
874 mediatek,syscon-wakeup = <&pericfg 0x400 1>;