Lines Matching +full:mv78230 +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(thermal-ic) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
48 #address-cells = <2>;
49 #size-cells = <2>;
50 compatible = "simple-bus";
51 interrupt-parent = <&CP11X_LABEL(icu_nsr)>;
54 config-space@CP11X_BASE {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "simple-bus";
61 compatible = "marvell,armada-7k-pp22";
66 clock-names = "pp_clk", "gop_clk",
68 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
70 dma-coherent;
83 interrupt-names = "hif0", "hif1", "hif2",
86 port-id = <0>;
87 gop-port-id = <0>;
102 interrupt-names = "hif0", "hif1", "hif2",
105 port-id = <1>;
106 gop-port-id = <2>;
121 interrupt-names = "hif0", "hif1", "hif2",
124 port-id = <2>;
125 gop-port-id = <3>;
131 compatible = "marvell,comphy-cp110";
133 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
136 clock-names = "mg_clk", "mg_core_clk", "axi_clk";
137 #address-cells = <1>;
138 #size-cells = <0>;
142 #phy-cells = <1>;
147 #phy-cells = <1>;
152 #phy-cells = <1>;
157 #phy-cells = <1>;
162 #phy-cells = <1>;
167 #phy-cells = <1>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174 compatible = "marvell,orion-mdio";
182 #address-cells = <1>;
183 #size-cells = <0>;
191 CP11X_LABEL(icu): interrupt-controller@1e0000 {
192 compatible = "marvell,cp110-icu";
194 #address-cells = <1>;
195 #size-cells = <1>;
197 CP11X_LABEL(icu_nsr): interrupt-controller@10 {
198 compatible = "marvell,cp110-icu-nsr";
200 #interrupt-cells = <2>;
201 interrupt-controller;
202 msi-parent = <&gicp>;
205 CP11X_LABEL(icu_sei): interrupt-controller@50 {
206 compatible = "marvell,cp110-icu-sei";
208 #interrupt-cells = <2>;
209 interrupt-controller;
210 msi-parent = <&sei>;
215 compatible = "marvell,armada-8k-rtc";
217 reg-names = "rtc", "rtc-soc";
221 CP11X_LABEL(syscon0): system-controller@440000 {
222 compatible = "syscon", "simple-mfd";
226 compatible = "marvell,cp110-clock";
227 #clock-cells = <2>;
231 compatible = "marvell,armada-8k-gpio";
234 gpio-controller;
235 #gpio-cells = <2>;
236 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 0 32>;
237 interrupt-controller;
242 #interrupt-cells = <2>;
247 compatible = "marvell,armada-8k-gpio";
250 gpio-controller;
251 #gpio-cells = <2>;
252 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 32 31>;
253 interrupt-controller;
258 #interrupt-cells = <2>;
263 CP11X_LABEL(syscon1): system-controller@400000 {
264 compatible = "syscon", "simple-mfd";
266 #address-cells = <1>;
267 #size-cells = <1>;
269 CP11X_LABEL(thermal): thermal-sensor@70 {
270 compatible = "marvell,armada-cp110-thermal";
272 interrupts-extended =
274 #thermal-sensor-cells = <1>;
279 compatible = "marvell,armada-8k-xhci",
280 "generic-xhci";
282 dma-coherent;
284 clock-names = "core", "reg";
291 compatible = "marvell,armada-8k-xhci",
292 "generic-xhci";
294 dma-coherent;
296 clock-names = "core", "reg";
303 compatible = "marvell,armada-8k-ahci",
304 "generic-ahci";
306 dma-coherent;
310 #address-cells = <1>;
311 #size-cells = <0>;
314 sata-port@0 {
318 sata-port@1 {
324 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
326 dma-coherent;
327 msi-parent = <&gic_v2m0>;
328 clock-names = "core", "reg";
334 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
336 dma-coherent;
337 msi-parent = <&gic_v2m0>;
338 clock-names = "core", "reg";
344 compatible = "marvell,armada-380-spi";
346 #address-cells = <0x1>;
347 #size-cells = <0x0>;
348 clock-names = "core", "axi";
355 compatible = "marvell,armada-380-spi";
357 #address-cells = <1>;
358 #size-cells = <0>;
359 clock-names = "core", "axi";
365 CP11X_LABEL(i2c0): i2c@701000 {
366 compatible = "marvell,mv78230-i2c";
368 #address-cells = <1>;
369 #size-cells = <0>;
371 clock-names = "core", "reg";
377 CP11X_LABEL(i2c1): i2c@701100 {
378 compatible = "marvell,mv78230-i2c";
380 #address-cells = <1>;
381 #size-cells = <0>;
383 clock-names = "core", "reg";
390 compatible = "snps,dw-apb-uart";
392 reg-shift = <2>;
394 reg-io-width = <1>;
395 clock-names = "baudclk", "apb_pclk";
402 compatible = "snps,dw-apb-uart";
404 reg-shift = <2>;
406 reg-io-width = <1>;
407 clock-names = "baudclk", "apb_pclk";
414 compatible = "snps,dw-apb-uart";
416 reg-shift = <2>;
418 reg-io-width = <1>;
419 clock-names = "baudclk", "apb_pclk";
426 compatible = "snps,dw-apb-uart";
428 reg-shift = <2>;
430 reg-io-width = <1>;
431 clock-names = "baudclk", "apb_pclk";
443 compatible = "marvell,armada-8k-nand-controller",
444 "marvell,armada370-nand-controller";
446 #address-cells = <1>;
447 #size-cells = <0>;
449 clock-names = "core", "reg";
452 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
457 compatible = "marvell,armada-8k-rng",
458 "inside-secure,safexcel-eip76";
461 clock-names = "core", "reg";
468 compatible = "marvell,armada-cp110-sdhci";
471 clock-names = "core", "axi";
473 dma-coherent;
478 compatible = "inside-secure,safexcel-eip197b";
486 interrupt-names = "mem", "ring0", "ring1",
488 clock-names = "core", "reg";
491 dma-coherent;
496 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
499 reg-names = "ctrl", "config";
500 #address-cells = <3>;
501 #size-cells = <2>;
502 #interrupt-cells = <1>;
504 dma-coherent;
505 msi-parent = <&gic_v2m0>;
507 bus-range = <0 0xff>;
508 /* non-prefetchable memory */
510 interrupt-map-mask = <0 0 0 0>;
511 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
513 num-lanes = <1>;
514 clock-names = "core", "reg";
520 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
523 reg-names = "ctrl", "config";
524 #address-cells = <3>;
525 #size-cells = <2>;
526 #interrupt-cells = <1>;
528 dma-coherent;
529 msi-parent = <&gic_v2m0>;
531 bus-range = <0 0xff>;
532 /* non-prefetchable memory */
534 interrupt-map-mask = <0 0 0 0>;
535 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
538 num-lanes = <1>;
539 clock-names = "core", "reg";
545 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
548 reg-names = "ctrl", "config";
549 #address-cells = <3>;
550 #size-cells = <2>;
551 #interrupt-cells = <1>;
553 dma-coherent;
554 msi-parent = <&gic_v2m0>;
556 bus-range = <0 0xff>;
557 /* non-prefetchable memory */
559 interrupt-map-mask = <0 0 0 0>;
560 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
563 num-lanes = <1>;
564 clock-names = "core", "reg";