Lines Matching +full:0 +full:x701000
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
58 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
60 CP11X_LABEL(ethernet): ethernet@0 {
62 reg = <0x0 0x100000>, <0x129000 0xb000>;
86 port-id = <0>;
87 gop-port-id = <0>;
132 reg = <0x120000 0x6000>;
138 #size-cells = <0>;
140 CP11X_LABEL(comphy0): phy@0 {
141 reg = <0>;
173 #size-cells = <0>;
175 reg = <0x12a200 0x10>;
183 #size-cells = <0>;
185 reg = <0x12a600 0x10>;
193 reg = <0x1e0000 0x440>;
199 reg = <0x10 0x20>;
207 reg = <0x50 0x10>;
216 reg = <0x284000 0x20>, <0x284080 0x24>;
223 reg = <0x440000 0x2000>;
232 offset = <0x100>;
236 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 0 32>;
248 offset = <0x140>;
252 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 32 31>;
265 reg = <0x400000 0x1000>;
271 reg = <0x70 0x10>;
281 reg = <0x500000 0x4000>;
293 reg = <0x510000 0x4000>;
305 reg = <0x540000 0x30000>;
311 #size-cells = <0>;
314 sata-port@0 {
315 reg = <0>;
325 reg = <0x6a0000 0x1000>, <0x6b0000 0x1000>;
335 reg = <0x6c0000 0x1000>, <0x6d0000 0x1000>;
345 reg = <0x700600 0x50>;
346 #address-cells = <0x1>;
347 #size-cells = <0x0>;
356 reg = <0x700680 0x50>;
358 #size-cells = <0>;
367 reg = <0x701000 0x20>;
369 #size-cells = <0>;
379 reg = <0x701100 0x20>;
381 #size-cells = <0>;
391 reg = <0x702000 0x100>;
403 reg = <0x702100 0x100>;
415 reg = <0x702200 0x100>;
427 reg = <0x702300 0x100>;
445 reg = <0x720000 0x54>;
447 #size-cells = <0>;
459 reg = <0x760000 0x7d>;
469 reg = <0x780000 0x300>;
479 reg = <0x800000 0x200000>;
497 reg = <0 ADDRESSIFY(CP11X_PCIE0_BASE) 0 0x10000>,
498 <0 CP11X_PCIEx_CONF_BASE(0) 0 0x80000>;
507 bus-range = <0 0xff>;
509 …ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(0) 0 CP11X_PCIEx_MEM_BASE(0) 0 CP11X_PCIEx_MEM_SIZE(0…
510 interrupt-map-mask = <0 0 0 0>;
511 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
521 reg = <0 ADDRESSIFY(CP11X_PCIE1_BASE) 0 0x10000>,
522 <0 CP11X_PCIEx_CONF_BASE(1) 0 0x80000>;
531 bus-range = <0 0xff>;
533 …ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0 CP11X_PCIEx_MEM_BASE(1) 0 CP11X_PCIEx_MEM_SIZE(1…
534 interrupt-map-mask = <0 0 0 0>;
535 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
546 reg = <0 ADDRESSIFY(CP11X_PCIE2_BASE) 0 0x10000>,
547 <0 CP11X_PCIEx_CONF_BASE(2) 0 0x80000>;
556 bus-range = <0 0xff>;
558 …ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(2) 0 CP11X_PCIEx_MEM_BASE(2) 0 CP11X_PCIEx_MEM_SIZE(2…
559 interrupt-map-mask = <0 0 0 0>;
560 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;