Lines Matching full:clkmgr
105 clkmgr: clock-controller@ffd10000 { label
106 compatible = "intel,agilex-clkmgr";
152 clocks = <&clkmgr AGILEX_EMAC0_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
170 clocks = <&clkmgr AGILEX_EMAC1_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
188 clocks = <&clkmgr AGILEX_EMAC2_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
240 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
251 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
262 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
273 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
284 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
297 clocks = <&clkmgr AGILEX_L4_MP_CLK>,
298 <&clkmgr AGILEX_SDMMC_CLK>;
312 clocks = <&clkmgr AGILEX_NAND_CLK>,
313 <&clkmgr AGILEX_NAND_X_CLK>,
314 <&clkmgr AGILEX_NAND_ECC_CLK>;
342 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
370 clocks = <&clkmgr AGILEX_MPU_CCU_CLK>,
371 <&clkmgr AGILEX_L3_MAIN_FREE_CLK>,
372 <&clkmgr AGILEX_L4_MAIN_CLK>;
386 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
400 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
422 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
430 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
438 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
446 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
458 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
468 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
486 clocks = <&clkmgr AGILEX_USB_CLK>;
500 clocks = <&clkmgr AGILEX_USB_CLK>;
509 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
518 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
527 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
536 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;