Lines Matching +full:0 +full:x5000000
11 /memreserve/ 0x80000000 0x00010000;
25 #size-cells = <0>;
28 cpu0: cpu@0 {
32 reg = <0x0>;
33 clocks = <&clockgen 1 0>;
34 d-cache-size = <0x8000>;
37 i-cache-size = <0xC000>;
49 reg = <0x1>;
50 clocks = <&clockgen 1 0>;
51 d-cache-size = <0x8000>;
54 i-cache-size = <0xC000>;
66 reg = <0x100>;
68 d-cache-size = <0x8000>;
71 i-cache-size = <0xC000>;
83 reg = <0x101>;
85 d-cache-size = <0x8000>;
88 i-cache-size = <0xC000>;
100 reg = <0x200>;
102 d-cache-size = <0x8000>;
105 i-cache-size = <0xC000>;
117 reg = <0x201>;
119 d-cache-size = <0x8000>;
122 i-cache-size = <0xC000>;
134 reg = <0x300>;
136 d-cache-size = <0x8000>;
139 i-cache-size = <0xC000>;
151 reg = <0x301>;
153 d-cache-size = <0x8000>;
156 i-cache-size = <0xC000>;
168 reg = <0x400>;
170 d-cache-size = <0x8000>;
173 i-cache-size = <0xC000>;
185 reg = <0x401>;
187 d-cache-size = <0x8000>;
190 i-cache-size = <0xC000>;
202 reg = <0x500>;
204 d-cache-size = <0x8000>;
207 i-cache-size = <0xC000>;
219 reg = <0x501>;
221 d-cache-size = <0x8000>;
224 i-cache-size = <0xC000>;
236 reg = <0x600>;
238 d-cache-size = <0x8000>;
241 i-cache-size = <0xC000>;
253 reg = <0x601>;
255 d-cache-size = <0x8000>;
258 i-cache-size = <0xC000>;
270 reg = <0x700>;
272 d-cache-size = <0x8000>;
275 i-cache-size = <0xC000>;
287 reg = <0x701>;
289 d-cache-size = <0x8000>;
292 i-cache-size = <0xC000>;
302 cache-size = <0x100000>;
310 cache-size = <0x100000>;
318 cache-size = <0x100000>;
326 cache-size = <0x100000>;
334 cache-size = <0x100000>;
342 cache-size = <0x100000>;
350 cache-size = <0x100000>;
358 cache-size = <0x100000>;
367 arm,psci-suspend-param = <0x0>;
376 reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
377 <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
379 <0x0 0x0c0c0000 0 0x2000>, // GICC
380 <0x0 0x0c0d0000 0 0x1000>, // GICH
381 <0x0 0x0c0e0000 0 0x20000>; // GICV
392 reg = <0x0 0x6020000 0 0x20000>;
417 reg = <0x00000000 0x80000000 0 0x80000000>;
422 reg = <0x0 0x1080000 0x0 0x1000>;
429 reg = <0x0 0x1090000 0x0 0x1000>;
437 #clock-cells = <0>;
446 thermal-sensors = <&tmu 0>;
612 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
615 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
619 ranges = <0x0 0x00 0x8000000 0x100000>;
620 reg = <0x00 0x8000000 0x0 0x100000>;
626 compatible = "fsl,sec-v5.0-job-ring",
627 "fsl,sec-v4.0-job-ring";
628 reg = <0x10000 0x10000>;
633 compatible = "fsl,sec-v5.0-job-ring",
634 "fsl,sec-v4.0-job-ring";
635 reg = <0x20000 0x10000>;
640 compatible = "fsl,sec-v5.0-job-ring",
641 "fsl,sec-v4.0-job-ring";
642 reg = <0x30000 0x10000>;
647 compatible = "fsl,sec-v5.0-job-ring",
648 "fsl,sec-v4.0-job-ring";
649 reg = <0x40000 0x10000>;
656 reg = <0 0x1300000 0 0xa0000>;
663 reg = <0x0 0x1e00000 0x0 0x10000>;
669 reg = <0x0 0x1f80000 0x0 0x10000>;
671 fsl,tmu-range = <0x800000e6 0x8001017d>;
674 <0x00000000 0x00000035
676 0x00000001 0x00000154>;
684 #size-cells = <0>;
685 reg = <0x0 0x2000000 0x0 0x10000>;
696 #size-cells = <0>;
697 reg = <0x0 0x2010000 0x0 0x10000>;
707 #size-cells = <0>;
708 reg = <0x0 0x2020000 0x0 0x10000>;
718 #size-cells = <0>;
719 reg = <0x0 0x2030000 0x0 0x10000>;
729 #size-cells = <0>;
730 reg = <0x0 0x2040000 0x0 0x10000>;
741 #size-cells = <0>;
742 reg = <0x0 0x2050000 0x0 0x10000>;
752 #size-cells = <0>;
753 reg = <0x0 0x2060000 0x0 0x10000>;
763 #size-cells = <0>;
764 reg = <0x0 0x2070000 0x0 0x10000>;
774 #size-cells = <0>;
775 reg = <0x0 0x20c0000 0x0 0x10000>,
776 <0x0 0x20000000 0x0 0x10000000>;
787 #size-cells = <0>;
788 reg = <0x0 0x2100000 0x0 0x10000>;
793 bus-num = <0>;
800 #size-cells = <0>;
801 reg = <0x0 0x2110000 0x0 0x10000>;
813 #size-cells = <0>;
814 reg = <0x0 0x2120000 0x0 0x10000>;
825 reg = <0x0 0x2140000 0x0 0x10000>;
826 interrupts = <0 28 0x4>; /* Level high type */
838 reg = <0x0 0x2150000 0x0 0x10000>;
839 interrupts = <0 63 0x4>; /* Level high type */
852 reg = <0x0 0x21c0000 0x0 0x1000>;
860 reg = <0x0 0x21d0000 0x0 0x1000>;
868 reg = <0x0 0x21e0000 0x0 0x1000>;
876 reg = <0x0 0x21f0000 0x0 0x1000>;
884 reg = <0x0 0x2300000 0x0 0x10000>;
895 reg = <0x0 0x2310000 0x0 0x10000>;
906 reg = <0x0 0x2320000 0x0 0x10000>;
917 reg = <0x0 0x2330000 0x0 0x10000>;
928 reg = <0x0 0x23a0000 0 0x1000>,
929 <0x0 0x2390000 0 0x1000>;
936 reg = <0x0 0x1e34040 0x0 0x1c>;
943 reg = <0x0 0x2800000 0x0 0x10000>;
944 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
950 reg = <0x0 0x3100000 0x0 0x10000>;
953 snps,quirk-frame-length-adjustment = <0x20>;
961 reg = <0x0 0x3110000 0x0 0x10000>;
964 snps,quirk-frame-length-adjustment = <0x20>;
972 reg = <0x0 0x3200000 0x0 0x10000>,
973 <0x7 0x100520 0x0 0x4>;
983 reg = <0x0 0x3210000 0x0 0x10000>,
984 <0x7 0x100520 0x0 0x4>;
994 reg = <0x0 0x3220000 0x0 0x10000>,
995 <0x7 0x100520 0x0 0x4>;
1005 reg = <0x0 0x3230000 0x0 0x10000>,
1006 <0x7 0x100520 0x0 0x4>;
1016 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
1017 0x80 0x00000000 0x0 0x00002000>; /* configuration space */
1029 bus-range = <0x0 0xff>;
1030 … ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1033 interrupt-map-mask = <0 0 0 7>;
1034 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
1035 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
1036 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
1037 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1038 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1044 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
1045 0x88 0x00000000 0x0 0x00002000>; /* configuration space */
1057 bus-range = <0x0 0xff>;
1058 … ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1061 interrupt-map-mask = <0 0 0 7>;
1062 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1063 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
1064 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1065 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1066 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1072 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
1073 0x90 0x00000000 0x0 0x00002000>; /* configuration space */
1085 bus-range = <0x0 0xff>;
1086 … ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1089 interrupt-map-mask = <0 0 0 7>;
1090 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1091 <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1092 <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1093 <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
1094 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1100 reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
1101 0x98 0x00000000 0x0 0x00002000>; /* configuration space */
1113 bus-range = <0x0 0xff>;
1114 … ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1117 interrupt-map-mask = <0 0 0 7>;
1118 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1119 <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1120 <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1121 <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1122 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1128 reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */
1129 0xa0 0x00000000 0x0 0x00002000>; /* configuration space */
1141 bus-range = <0x0 0xff>;
1142 … ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1145 interrupt-map-mask = <0 0 0 7>;
1146 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
1147 <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
1148 <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1149 <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
1150 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1156 reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */
1157 0xa8 0x00000000 0x0 0x00002000>; /* configuration space */
1169 bus-range = <0x0 0xff>;
1170 … ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1173 interrupt-map-mask = <0 0 0 7>;
1174 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1175 <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1176 <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1177 <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1178 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1184 reg = <0 0x5000000 0 0x800000>;
1195 // performance counter interrupts 0-9
1276 reg = <0x00000000 0x08340020 0 0x2>;
1281 reg = <0x0 0x8b95000 0x0 0x100>;
1287 /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
1290 reg = <0x0 0x8b96000 0x0 0x1000>;
1293 #size-cells = <0>;
1300 reg = <0x0 0x8b97000 0x0 0x1000>;
1304 #size-cells = <0>;
1310 reg = <0x00000008 0x0c000000 0 0x40>,
1311 <0x00000000 0x08340000 0 0x40000>;
1314 iommu-map = <0 &smmu 0 0>;
1320 * Region type 0x0 - MC portals
1321 * Region type 0x1 - QBMAN portals
1323 ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
1324 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
1331 #size-cells = <0>;
1335 reg = <0x1>;
1340 reg = <0x2>;
1345 reg = <0x3>;
1350 reg = <0x4>;
1355 reg = <0x5>;
1360 reg = <0x6>;
1365 reg = <0x7>;
1370 reg = <0x8>;
1375 reg = <0x9>;
1380 reg = <0xa>;
1385 reg = <0xb>;
1390 reg = <0xc>;
1395 reg = <0xd>;
1400 reg = <0xe>;
1405 reg = <0xf>;
1410 reg = <0x10>;
1415 reg = <0x11>;
1420 reg = <0x12>;