Lines Matching +full:gic +full:- +full:its
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 /* DRAM space - 1, size : 2 GB DRAM */
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <100000000>;
45 clock-output-names = "sysclk";
48 gic: interrupt-controller@6000000 { label
49 compatible = "arm,gic-v3";
50 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
55 #interrupt-cells = <3>;
56 #address-cells = <2>;
57 #size-cells = <2>;
59 interrupt-controller;
62 its: gic-its@6020000 { label
63 compatible = "arm,gic-v3-its";
64 msi-controller;
70 compatible = "fsl,ls2080a-rstcr", "syscon";
75 compatible ="syscon-reboot";
81 thermal-zones {
82 ddr-controller1 {
83 polling-delay-passive = <1000>;
84 polling-delay = <5000>;
85 thermal-sensors = <&tmu 1>;
88 ddr-ctrler1-crit {
96 ddr-controller2 {
97 polling-delay-passive = <1000>;
98 polling-delay = <5000>;
99 thermal-sensors = <&tmu 2>;
102 ddr-ctrler2-crit {
110 ddr-controller3 {
111 polling-delay-passive = <1000>;
112 polling-delay = <5000>;
113 thermal-sensors = <&tmu 3>;
116 ddr-ctrler3-crit {
124 core-cluster1 {
125 polling-delay-passive = <1000>;
126 polling-delay = <5000>;
127 thermal-sensors = <&tmu 4>;
130 core_cluster1_alert: core-cluster1-alert {
136 core-cluster1-crit {
143 cooling-maps {
146 cooling-device =
153 core-cluster2 {
154 polling-delay-passive = <1000>;
155 polling-delay = <5000>;
156 thermal-sensors = <&tmu 5>;
159 core_cluster2_alert: core-cluster2-alert {
165 core-cluster2-crit {
172 cooling-maps {
175 cooling-device =
182 core-cluster3 {
183 polling-delay-passive = <1000>;
184 polling-delay = <5000>;
185 thermal-sensors = <&tmu 6>;
188 core_cluster3_alert: core-cluster3-alert {
194 core-cluster3-crit {
201 cooling-maps {
204 cooling-device =
211 core-cluster4 {
212 polling-delay-passive = <1000>;
213 polling-delay = <5000>;
214 thermal-sensors = <&tmu 7>;
217 core_cluster4_alert: core-cluster4-alert {
223 core-cluster4-crit {
230 cooling-maps {
233 cooling-device =
242 compatible = "arm,armv8-timer";
243 interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
244 <1 14 4>, /* Physical Non-Secure PPI, active-low */
245 <1 11 4>, /* Virtual PPI, active-low */
246 <1 10 4>; /* Hypervisor PPI, active-low */
247 fsl,erratum-a008585;
251 compatible = "arm,armv8-pmuv3";
256 compatible = "arm,psci-0.2";
261 compatible = "simple-bus";
262 #address-cells = <2>;
263 #size-cells = <2>;
265 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
268 compatible = "fsl,ls2080a-clockgen";
270 #clock-cells = <2>;
275 compatible = "fsl,ls2080a-dcfg", "syscon";
277 little-endian;
281 compatible = "fsl,qoriq-tmu";
284 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
285 fsl,tmu-calibration = <0x00000000 0x00000026
321 little-endian;
322 #thermal-sensor-cells = <1>;
354 compatible = "arm,sp805-wdt", "arm,primecell";
357 clock-names = "wdog_clk", "apb_pclk";
361 compatible = "arm,sp805-wdt", "arm,primecell";
364 clock-names = "wdog_clk", "apb_pclk";
368 compatible = "arm,sp805-wdt", "arm,primecell";
371 clock-names = "wdog_clk", "apb_pclk";
375 compatible = "arm,sp805-wdt", "arm,primecell";
378 clock-names = "wdog_clk", "apb_pclk";
382 compatible = "arm,sp805-wdt", "arm,primecell";
385 clock-names = "wdog_clk", "apb_pclk";
389 compatible = "arm,sp805-wdt", "arm,primecell";
392 clock-names = "wdog_clk", "apb_pclk";
396 compatible = "arm,sp805-wdt", "arm,primecell";
399 clock-names = "wdog_clk", "apb_pclk";
403 compatible = "arm,sp805-wdt", "arm,primecell";
406 clock-names = "wdog_clk", "apb_pclk";
410 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
411 fsl,sec-era = <8>;
412 #address-cells = <1>;
413 #size-cells = <1>;
417 dma-coherent;
420 compatible = "fsl,sec-v5.0-job-ring",
421 "fsl,sec-v4.0-job-ring";
427 compatible = "fsl,sec-v5.0-job-ring",
428 "fsl,sec-v4.0-job-ring";
434 compatible = "fsl,sec-v5.0-job-ring",
435 "fsl,sec-v4.0-job-ring";
441 compatible = "fsl,sec-v5.0-job-ring",
442 "fsl,sec-v4.0-job-ring";
449 compatible = "fsl,dpaa2-console";
453 ptp-timer@8b95000 {
454 compatible = "fsl,dpaa2-ptp";
457 little-endian;
458 fsl,extts-fifo;
461 fsl_mc: fsl-mc@80c000000 {
462 compatible = "fsl,qoriq-mc";
465 msi-parent = <&its>;
466 iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
467 dma-coherent;
468 #address-cells = <3>;
469 #size-cells = <1>;
472 * Region type 0x0 - MC portals
473 * Region type 0x1 - QBMAN portals
482 #address-cells = <1>;
483 #size-cells = <0>;
486 compatible = "fsl,qoriq-mc-dpmac";
491 compatible = "fsl,qoriq-mc-dpmac";
496 compatible = "fsl,qoriq-mc-dpmac";
501 compatible = "fsl,qoriq-mc-dpmac";
506 compatible = "fsl,qoriq-mc-dpmac";
511 compatible = "fsl,qoriq-mc-dpmac";
516 compatible = "fsl,qoriq-mc-dpmac";
521 compatible = "fsl,qoriq-mc-dpmac";
526 compatible = "fsl,qoriq-mc-dpmac";
531 compatible = "fsl,qoriq-mc-dpmac";
536 compatible = "fsl,qoriq-mc-dpmac";
541 compatible = "fsl,qoriq-mc-dpmac";
546 compatible = "fsl,qoriq-mc-dpmac";
551 compatible = "fsl,qoriq-mc-dpmac";
556 compatible = "fsl,qoriq-mc-dpmac";
561 compatible = "fsl,qoriq-mc-dpmac";
568 compatible = "arm,mmu-500";
570 #global-interrupts = <12>;
571 #iommu-cells = <1>;
572 stream-match-mask = <0x7C00>;
573 dma-coherent;
576 <0 15 4>, /* global non-secure fault */
577 <0 16 4>, /* combined non-secure interrupt */
578 /* performance counter interrupts 0-7 */
620 compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
621 #address-cells = <1>;
622 #size-cells = <0>;
626 clock-names = "dspi";
627 spi-num-chipselects = <5>;
628 bus-num = <0>;
633 compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
637 voltage-ranges = <1800 1800 3300 3300>;
638 sdhci,auto-cmd12;
639 little-endian;
640 bus-width = <4>;
644 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
647 gpio-controller;
648 little-endian;
649 #gpio-cells = <2>;
650 interrupt-controller;
651 #interrupt-cells = <2>;
655 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
658 gpio-controller;
659 little-endian;
660 #gpio-cells = <2>;
661 interrupt-controller;
662 #interrupt-cells = <2>;
666 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
669 gpio-controller;
670 little-endian;
671 #gpio-cells = <2>;
672 interrupt-controller;
673 #interrupt-cells = <2>;
677 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
680 gpio-controller;
681 little-endian;
682 #gpio-cells = <2>;
683 interrupt-controller;
684 #interrupt-cells = <2>;
689 compatible = "fsl,vf610-i2c";
690 #address-cells = <1>;
691 #size-cells = <0>;
694 clock-names = "i2c";
700 compatible = "fsl,vf610-i2c";
701 #address-cells = <1>;
702 #size-cells = <0>;
705 clock-names = "i2c";
711 compatible = "fsl,vf610-i2c";
712 #address-cells = <1>;
713 #size-cells = <0>;
716 clock-names = "i2c";
722 compatible = "fsl,vf610-i2c";
723 #address-cells = <1>;
724 #size-cells = <0>;
727 clock-names = "i2c";
732 compatible = "fsl,ifc", "simple-bus";
735 little-endian;
736 #address-cells = <2>;
737 #size-cells = <1>;
745 compatible = "fsl,ls2080a-qspi";
746 #address-cells = <1>;
747 #size-cells = <0>;
750 reg-names = "QuadSPI", "QuadSPI-memory";
753 clock-names = "qspi_en", "qspi";
758 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
759 reg-names = "regs", "config";
761 interrupt-names = "intr";
762 #address-cells = <3>;
763 #size-cells = <2>;
765 dma-coherent;
766 num-viewport = <6>;
767 bus-range = <0x0 0xff>;
768 msi-parent = <&its>;
769 #interrupt-cells = <1>;
770 interrupt-map-mask = <0 0 0 7>;
771 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
772 <0000 0 0 2 &gic 0 0 0 110 4>,
773 <0000 0 0 3 &gic 0 0 0 111 4>,
774 <0000 0 0 4 &gic 0 0 0 112 4>;
775 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
780 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
781 reg-names = "regs", "config";
783 interrupt-names = "intr";
784 #address-cells = <3>;
785 #size-cells = <2>;
787 dma-coherent;
788 num-viewport = <6>;
789 bus-range = <0x0 0xff>;
790 msi-parent = <&its>;
791 #interrupt-cells = <1>;
792 interrupt-map-mask = <0 0 0 7>;
793 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
794 <0000 0 0 2 &gic 0 0 0 115 4>,
795 <0000 0 0 3 &gic 0 0 0 116 4>,
796 <0000 0 0 4 &gic 0 0 0 117 4>;
797 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
802 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
803 reg-names = "regs", "config";
805 interrupt-names = "intr";
806 #address-cells = <3>;
807 #size-cells = <2>;
809 dma-coherent;
810 num-viewport = <256>;
811 bus-range = <0x0 0xff>;
812 msi-parent = <&its>;
813 #interrupt-cells = <1>;
814 interrupt-map-mask = <0 0 0 7>;
815 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
816 <0000 0 0 2 &gic 0 0 0 120 4>,
817 <0000 0 0 3 &gic 0 0 0 121 4>,
818 <0000 0 0 4 &gic 0 0 0 122 4>;
819 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
824 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
825 reg-names = "regs", "config";
827 interrupt-names = "intr";
828 #address-cells = <3>;
829 #size-cells = <2>;
831 dma-coherent;
832 num-viewport = <6>;
833 bus-range = <0x0 0xff>;
834 msi-parent = <&its>;
835 #interrupt-cells = <1>;
836 interrupt-map-mask = <0 0 0 7>;
837 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
838 <0000 0 0 2 &gic 0 0 0 125 4>,
839 <0000 0 0 3 &gic 0 0 0 126 4>,
840 <0000 0 0 4 &gic 0 0 0 127 4>;
841 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
847 compatible = "fsl,ls2080a-ahci";
851 dma-coherent;
856 compatible = "fsl,ls2080a-ahci";
860 dma-coherent;
869 snps,quirk-frame-length-adjustment = <0x20>;
871 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
880 snps,quirk-frame-length-adjustment = <0x20>;
882 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
886 compatible = "arm,ccn-504";
891 rcpm: power-controller@1e34040 {
892 compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+";
894 #fsl,rcpm-wakeup-cells = <6>;
895 little-endian;
899 compatible = "fsl,ls208xa-ftm-alarm";
901 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
906 ddr1: memory-controller@1080000 {
907 compatible = "fsl,qoriq-memory-controller";
910 little-endian;
913 ddr2: memory-controller@1090000 {
914 compatible = "fsl,qoriq-memory-controller";
917 little-endian;
922 compatible = "linaro,optee-tz";