Lines Matching +full:vf610 +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
38 * We expect the enable-method for cpu's to be "psci", but this
41 * Currently supported enable-method is psci v0.2
45 compatible = "arm,cortex-a53";
48 next-level-cache = <&l2>;
49 cpu-idle-states = <&CPU_PH20>;
50 #cooling-cells = <2>;
55 compatible = "arm,cortex-a53";
58 next-level-cache = <&l2>;
59 cpu-idle-states = <&CPU_PH20>;
60 #cooling-cells = <2>;
65 compatible = "arm,cortex-a53";
68 next-level-cache = <&l2>;
69 cpu-idle-states = <&CPU_PH20>;
70 #cooling-cells = <2>;
75 compatible = "arm,cortex-a53";
78 next-level-cache = <&l2>;
79 cpu-idle-states = <&CPU_PH20>;
80 #cooling-cells = <2>;
83 l2: l2-cache {
88 idle-states {
90 * PSCI node is not added default, U-boot will add missing
93 entry-method = "psci";
95 CPU_PH20: cpu-ph20 {
96 compatible = "arm,idle-state";
97 idle-state-name = "PH20";
98 arm,psci-suspend-param = <0x0>;
99 entry-latency-us = <1000>;
100 exit-latency-us = <1000>;
101 min-residency-us = <3000>;
111 reserved-memory {
112 #address-cells = <2>;
113 #size-cells = <2>;
116 bman_fbpr: bman-fbpr {
117 compatible = "shared-dma-pool";
120 no-map;
123 qman_fqd: qman-fqd {
124 compatible = "shared-dma-pool";
127 no-map;
130 qman_pfdr: qman-pfdr {
131 compatible = "shared-dma-pool";
134 no-map;
139 compatible = "fixed-clock";
140 #clock-cells = <0>;
141 clock-frequency = <100000000>;
142 clock-output-names = "sysclk";
146 compatible ="syscon-reboot";
152 thermal-zones {
153 ddr-controller {
154 polling-delay-passive = <1000>;
155 polling-delay = <5000>;
156 thermal-sensors = <&tmu 0>;
159 ddr-ctrler-alert {
165 ddr-ctrler-crit {
174 polling-delay-passive = <1000>;
175 polling-delay = <5000>;
176 thermal-sensors = <&tmu 1>;
179 serdes-alert {
185 serdes-crit {
194 polling-delay-passive = <1000>;
195 polling-delay = <5000>;
196 thermal-sensors = <&tmu 2>;
199 fman-alert {
205 fman-crit {
213 core-cluster {
214 polling-delay-passive = <1000>;
215 polling-delay = <5000>;
216 thermal-sensors = <&tmu 3>;
219 core_cluster_alert: core-cluster-alert {
225 core_cluster_crit: core-cluster-crit {
232 cooling-maps {
235 cooling-device =
245 polling-delay-passive = <1000>;
246 polling-delay = <5000>;
247 thermal-sensors = <&tmu 4>;
250 sec-alert {
256 sec-crit {
266 compatible = "arm,armv8-timer";
268 <1 14 0xf08>, /* Physical Non-Secure PPI */
271 fsl,erratum-a008585;
275 compatible = "arm,armv8-pmuv3";
280 interrupt-affinity = <&cpu0>,
286 gic: interrupt-controller@1400000 {
287 compatible = "arm,gic-400";
288 #interrupt-cells = <3>;
289 interrupt-controller;
298 compatible = "simple-bus";
299 #address-cells = <2>;
300 #size-cells = <2>;
304 compatible = "fsl,ls1043a-clockgen";
306 #clock-cells = <2>;
311 compatible = "fsl,ls1043a-scfg", "syscon";
313 big-endian;
317 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
318 "fsl,sec-v4.0";
319 fsl,sec-era = <3>;
320 #address-cells = <1>;
321 #size-cells = <1>;
327 compatible = "fsl,sec-v5.4-job-ring",
328 "fsl,sec-v5.0-job-ring",
329 "fsl,sec-v4.0-job-ring";
335 compatible = "fsl,sec-v5.4-job-ring",
336 "fsl,sec-v5.0-job-ring",
337 "fsl,sec-v4.0-job-ring";
343 compatible = "fsl,sec-v5.4-job-ring",
344 "fsl,sec-v5.0-job-ring",
345 "fsl,sec-v4.0-job-ring";
351 compatible = "fsl,sec-v5.4-job-ring",
352 "fsl,sec-v5.0-job-ring",
353 "fsl,sec-v4.0-job-ring";
360 compatible = "fsl,ls1043a-dcfg", "syscon";
362 big-endian;
366 compatible = "fsl,ifc", "simple-bus";
372 compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
373 #address-cells = <1>;
374 #size-cells = <0>;
377 reg-names = "QuadSPI", "QuadSPI-memory";
379 clock-names = "qspi_en", "qspi";
385 compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
388 clock-frequency = <0>;
389 voltage-ranges = <1800 1800 3300 3300>;
390 sdhci,auto-cmd12;
391 big-endian;
392 bus-width = <4>;
395 ddr: memory-controller@1080000 {
396 compatible = "fsl,qoriq-memory-controller";
399 big-endian;
403 compatible = "fsl,qoriq-tmu";
406 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
407 fsl,tmu-calibration = <0x00000000 0x00000026
443 #thermal-sensor-cells = <1>;
450 memory-region = <&qman_fqd &qman_pfdr>;
457 memory-region = <&bman_fbpr>;
460 bportals: bman-portals@508000000 {
464 qportals: qman-portals@500000000 {
469 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
470 #address-cells = <1>;
471 #size-cells = <0>;
474 clock-names = "dspi";
476 spi-num-chipselects = <5>;
477 big-endian;
482 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
483 #address-cells = <1>;
484 #size-cells = <0>;
487 clock-names = "dspi";
489 spi-num-chipselects = <5>;
490 big-endian;
494 i2c0: i2c@2180000 {
495 compatible = "fsl,vf610-i2c";
496 #address-cells = <1>;
497 #size-cells = <0>;
500 clock-names = "i2c";
504 dma-names = "tx", "rx";
508 i2c1: i2c@2190000 {
509 compatible = "fsl,vf610-i2c";
510 #address-cells = <1>;
511 #size-cells = <0>;
514 clock-names = "i2c";
519 i2c2: i2c@21a0000 {
520 compatible = "fsl,vf610-i2c";
521 #address-cells = <1>;
522 #size-cells = <0>;
525 clock-names = "i2c";
530 i2c3: i2c@21b0000 {
531 compatible = "fsl,vf610-i2c";
532 #address-cells = <1>;
533 #size-cells = <0>;
536 clock-names = "i2c";
570 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
573 gpio-controller;
574 #gpio-cells = <2>;
575 interrupt-controller;
576 #interrupt-cells = <2>;
580 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
583 gpio-controller;
584 #gpio-cells = <2>;
585 interrupt-controller;
586 #interrupt-cells = <2>;
590 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
593 gpio-controller;
594 #gpio-cells = <2>;
595 interrupt-controller;
596 #interrupt-cells = <2>;
600 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
603 gpio-controller;
604 #gpio-cells = <2>;
605 interrupt-controller;
606 #interrupt-cells = <2>;
610 #address-cells = <1>;
611 #size-cells = <1>;
612 compatible = "fsl,qe", "simple-bus";
615 brg-frequency = <100000000>;
616 bus-frequency = <200000000>;
617 fsl,qe-num-riscs = <1>;
618 fsl,qe-num-snums = <28>;
621 compatible = "fsl,qe-ic";
623 #address-cells = <0>;
624 interrupt-controller;
625 #interrupt-cells = <1>;
631 #address-cells = <1>;
632 #size-cells = <0>;
633 compatible = "fsl,ls1043-qe-si",
634 "fsl,t1040-qe-si";
639 #address-cells = <1>;
640 #size-cells = <1>;
641 compatible = "fsl,ls1043-qe-siram",
642 "fsl,t1040-qe-siram";
647 cell-index = <1>;
650 interrupt-parent = <&qeic>;
654 cell-index = <3>;
657 interrupt-parent = <&qeic>;
661 #address-cells = <1>;
662 #size-cells = <1>;
663 compatible = "fsl,qe-muram", "fsl,cpm-muram";
666 data-only@0 {
667 compatible = "fsl,qe-muram-data",
668 "fsl,cpm-muram-data";
675 compatible = "fsl,ls1021a-lpuart";
679 clock-names = "ipg";
684 compatible = "fsl,ls1021a-lpuart";
688 clock-names = "ipg";
693 compatible = "fsl,ls1021a-lpuart";
697 clock-names = "ipg";
702 compatible = "fsl,ls1021a-lpuart";
706 clock-names = "ipg";
711 compatible = "fsl,ls1021a-lpuart";
715 clock-names = "ipg";
720 compatible = "fsl,ls1021a-lpuart";
724 clock-names = "ipg";
729 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
733 clock-names = "wdog";
734 big-endian;
738 #dma-cells = <2>;
739 compatible = "fsl,vf610-edma";
745 interrupt-names = "edma-tx", "edma-err";
746 dma-channels = <32>;
747 big-endian;
748 clock-names = "dmamux0", "dmamux1";
758 snps,quirk-frame-length-adjustment = <0x20>;
760 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
769 snps,quirk-frame-length-adjustment = <0x20>;
771 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
780 snps,quirk-frame-length-adjustment = <0x20>;
782 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
787 compatible = "fsl,ls1043a-ahci";
790 reg-names = "ahci", "sata-ecc";
793 dma-coherent;
796 msi1: msi-controller1@1571000 {
797 compatible = "fsl,ls1043a-msi";
799 msi-controller;
803 msi2: msi-controller2@1572000 {
804 compatible = "fsl,ls1043a-msi";
806 msi-controller;
810 msi3: msi-controller3@1573000 {
811 compatible = "fsl,ls1043a-msi";
813 msi-controller;
818 compatible = "fsl,ls1043a-pcie";
821 reg-names = "regs", "config";
824 interrupt-names = "intr", "pme";
825 #address-cells = <3>;
826 #size-cells = <2>;
828 dma-coherent;
829 num-viewport = <6>;
830 bus-range = <0x0 0xff>;
832 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
833 msi-parent = <&msi1>, <&msi2>, <&msi3>;
834 #interrupt-cells = <1>;
835 interrupt-map-mask = <0 0 0 7>;
836 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
844 compatible = "fsl,ls1043a-pcie";
847 reg-names = "regs", "config";
850 interrupt-names = "intr", "pme";
851 #address-cells = <3>;
852 #size-cells = <2>;
854 dma-coherent;
855 num-viewport = <6>;
856 bus-range = <0x0 0xff>;
858 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
859 msi-parent = <&msi1>, <&msi2>, <&msi3>;
860 #interrupt-cells = <1>;
861 interrupt-map-mask = <0 0 0 7>;
862 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
870 compatible = "fsl,ls1043a-pcie";
873 reg-names = "regs", "config";
876 interrupt-names = "intr", "pme";
877 #address-cells = <3>;
878 #size-cells = <2>;
880 dma-coherent;
881 num-viewport = <6>;
882 bus-range = <0x0 0xff>;
884 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
885 msi-parent = <&msi1>, <&msi2>, <&msi3>;
886 #interrupt-cells = <1>;
887 interrupt-map-mask = <0 0 0 7>;
888 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
895 qdma: dma-controller@8380000 {
896 compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
905 interrupt-names = "qdma-error", "qdma-queue0",
906 "qdma-queue1", "qdma-queue2", "qdma-queue3";
907 dma-channels = <8>;
908 block-number = <1>;
909 block-offset = <0x10000>;
910 fsl,dma-queues = <2>;
911 status-sizes = <64>;
912 queue-sizes = <64 64>;
913 big-endian;
916 rcpm: power-controller@1ee2140 {
917 compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
919 #fsl,rcpm-wakeup-cells = <1>;
923 compatible = "fsl,ls1043a-ftm-alarm";
925 fsl,rcpm-wakeup = <&rcpm 0x20000>;
927 big-endian;
933 compatible = "linaro,optee-tz";
940 #include "qoriq-qman-portals.dtsi"
941 #include "qoriq-bman-portals.dtsi"