Lines Matching +full:gic +full:- +full:its
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
30 compatible = "arm,cortex-a72";
32 enable-method = "psci";
34 next-level-cache = <&l2>;
35 cpu-idle-states = <&CPU_PW20>;
36 #cooling-cells = <2>;
41 compatible = "arm,cortex-a72";
43 enable-method = "psci";
45 next-level-cache = <&l2>;
46 cpu-idle-states = <&CPU_PW20>;
47 #cooling-cells = <2>;
50 l2: l2-cache {
55 idle-states {
57 * PSCI node is not added default, U-boot will add missing
60 entry-method = "psci";
62 CPU_PW20: cpu-pw20 {
63 compatible = "arm,idle-state";
64 idle-state-name = "PW20";
65 arm,psci-suspend-param = <0x0>;
66 entry-latency-us = <2000>;
67 exit-latency-us = <2000>;
68 min-residency-us = <6000>;
72 sysclk: clock-sysclk {
73 compatible = "fixed-clock";
74 #clock-cells = <0>;
75 clock-frequency = <100000000>;
76 clock-output-names = "sysclk";
79 osc_27m: clock-osc-27m {
80 compatible = "fixed-clock";
81 #clock-cells = <0>;
82 clock-frequency = <27000000>;
83 clock-output-names = "phy_27m";
86 dpclk: clock-controller@f1f0000 {
87 compatible = "fsl,ls1028a-plldig";
89 #clock-cells = <0>;
94 compatible ="syscon-reboot";
101 compatible = "arm,armv8-timer";
113 compatible = "arm,cortex-a72-pmu";
117 gic: interrupt-controller@6000000 { label
118 compatible= "arm,gic-v3";
119 #address-cells = <2>;
120 #size-cells = <2>;
122 reg= <0x0 0x06000000 0 0x10000>, /* GIC Dist */
123 <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
124 #interrupt-cells= <3>;
125 interrupt-controller;
128 its: gic-its@6020000 { label
129 compatible = "arm,gic-v3-its";
130 msi-controller;
131 reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
135 thermal-zones {
136 ddr-controller {
137 polling-delay-passive = <1000>;
138 polling-delay = <5000>;
139 thermal-sensors = <&tmu 0>;
142 ddr-ctrler-alert {
148 ddr-ctrler-crit {
156 core-cluster {
157 polling-delay-passive = <1000>;
158 polling-delay = <5000>;
159 thermal-sensors = <&tmu 1>;
162 core_cluster_alert: core-cluster-alert {
168 core_cluster_crit: core-cluster-crit {
175 cooling-maps {
178 cooling-device =
187 compatible = "simple-bus";
188 #address-cells = <2>;
189 #size-cells = <2>;
192 ddr: memory-controller@1080000 {
193 compatible = "fsl,qoriq-memory-controller";
196 big-endian;
200 compatible = "fsl,ls1028a-dcfg", "syscon";
202 little-endian;
208 little-endian;
212 compatible = "fsl,ls1028a-scfg", "syscon";
214 big-endian;
217 clockgen: clock-controller@1300000 {
218 compatible = "fsl,ls1028a-clockgen";
220 #clock-cells = <2>;
225 compatible = "fsl,vf610-i2c";
226 #address-cells = <1>;
227 #size-cells = <0>;
235 compatible = "fsl,vf610-i2c";
236 #address-cells = <1>;
237 #size-cells = <0>;
245 compatible = "fsl,vf610-i2c";
246 #address-cells = <1>;
247 #size-cells = <0>;
255 compatible = "fsl,vf610-i2c";
256 #address-cells = <1>;
257 #size-cells = <0>;
265 compatible = "fsl,vf610-i2c";
266 #address-cells = <1>;
267 #size-cells = <0>;
275 compatible = "fsl,vf610-i2c";
276 #address-cells = <1>;
277 #size-cells = <0>;
285 compatible = "fsl,vf610-i2c";
286 #address-cells = <1>;
287 #size-cells = <0>;
295 compatible = "fsl,vf610-i2c";
296 #address-cells = <1>;
297 #size-cells = <0>;
305 compatible = "nxp,lx2160a-fspi";
306 #address-cells = <1>;
307 #size-cells = <0>;
310 reg-names = "fspi_base", "fspi_mmap";
313 clock-names = "fspi_en", "fspi";
318 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
319 #address-cells = <1>;
320 #size-cells = <0>;
323 clock-names = "dspi";
326 dma-names = "tx", "rx";
327 spi-num-chipselects = <4>;
328 little-endian;
333 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
334 #address-cells = <1>;
335 #size-cells = <0>;
338 clock-names = "dspi";
341 dma-names = "tx", "rx";
342 spi-num-chipselects = <4>;
343 little-endian;
348 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
349 #address-cells = <1>;
350 #size-cells = <0>;
353 clock-names = "dspi";
356 dma-names = "tx", "rx";
357 spi-num-chipselects = <3>;
358 little-endian;
363 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
366 clock-frequency = <0>; /* fixed up by bootloader */
368 voltage-ranges = <1800 1800 3300 3300>;
369 sdhci,auto-cmd12;
370 little-endian;
371 bus-width = <4>;
376 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
379 clock-frequency = <0>; /* fixed up by bootloader */
381 voltage-ranges = <1800 1800 3300 3300>;
382 sdhci,auto-cmd12;
383 broken-cd;
384 little-endian;
385 bus-width = <4>;
407 compatible = "fsl,ls1028a-lpuart";
411 clock-names = "ipg";
412 dma-names = "rx","tx";
419 compatible = "fsl,ls1028a-lpuart";
423 clock-names = "ipg";
424 dma-names = "rx","tx";
431 compatible = "fsl,ls1028a-lpuart";
435 clock-names = "ipg";
436 dma-names = "rx","tx";
443 compatible = "fsl,ls1028a-lpuart";
447 clock-names = "ipg";
448 dma-names = "rx","tx";
455 compatible = "fsl,ls1028a-lpuart";
459 clock-names = "ipg";
460 dma-names = "rx","tx";
467 compatible = "fsl,ls1028a-lpuart";
471 clock-names = "ipg";
472 dma-names = "rx","tx";
478 edma0: dma-controller@22c0000 {
479 #dma-cells = <2>;
480 compatible = "fsl,ls1028a-edma", "fsl,vf610-edma";
486 interrupt-names = "edma-tx", "edma-err";
487 dma-channels = <32>;
488 clock-names = "dmamux0", "dmamux1";
494 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
497 gpio-controller;
498 #gpio-cells = <2>;
499 interrupt-controller;
500 #interrupt-cells = <2>;
501 little-endian;
505 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
508 gpio-controller;
509 #gpio-cells = <2>;
510 interrupt-controller;
511 #interrupt-cells = <2>;
512 little-endian;
516 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
519 gpio-controller;
520 #gpio-cells = <2>;
521 interrupt-controller;
522 #interrupt-cells = <2>;
523 little-endian;
527 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
532 snps,quirk-frame-length-adjustment = <0x20>;
533 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
537 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
542 snps,quirk-frame-length-adjustment = <0x20>;
543 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
547 compatible = "fsl,ls1028a-ahci";
550 reg-names = "ahci", "sata-ecc";
557 compatible = "fsl,ls1028a-pcie";
560 reg-names = "regs", "config";
563 interrupt-names = "pme", "aer";
564 #address-cells = <3>;
565 #size-cells = <2>;
567 dma-coherent;
568 num-viewport = <8>;
569 bus-range = <0x0 0xff>;
571 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
572 msi-parent = <&its>;
573 #interrupt-cells = <1>;
574 interrupt-map-mask = <0 0 0 7>;
575 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
576 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
577 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
578 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
579 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
584 compatible = "fsl,ls1028a-pcie";
587 reg-names = "regs", "config";
590 interrupt-names = "pme", "aer";
591 #address-cells = <3>;
592 #size-cells = <2>;
594 dma-coherent;
595 num-viewport = <8>;
596 bus-range = <0x0 0xff>;
598 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
599 msi-parent = <&its>;
600 #interrupt-cells = <1>;
601 interrupt-map-mask = <0 0 0 7>;
602 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
603 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
604 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
605 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
606 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
611 compatible = "arm,mmu-500";
613 #global-interrupts = <8>;
614 #iommu-cells = <1>;
615 stream-match-mask = <0x7c00>;
620 /* global non-secure fault */
622 /* combined non-secure interrupt */
624 /* performance counter interrupts 0-7 */
663 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
664 fsl,sec-era = <10>;
665 #address-cells = <1>;
666 #size-cells = <1>;
670 dma-coherent;
673 compatible = "fsl,sec-v5.0-job-ring",
674 "fsl,sec-v4.0-job-ring";
680 compatible = "fsl,sec-v5.0-job-ring",
681 "fsl,sec-v4.0-job-ring";
687 compatible = "fsl,sec-v5.0-job-ring",
688 "fsl,sec-v4.0-job-ring";
694 compatible = "fsl,sec-v5.0-job-ring",
695 "fsl,sec-v4.0-job-ring";
701 qdma: dma-controller@8380000 {
702 compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
711 interrupt-names = "qdma-error", "qdma-queue0",
712 "qdma-queue1", "qdma-queue2", "qdma-queue3";
713 dma-channels = <8>;
714 block-number = <1>;
715 block-offset = <0x10000>;
716 fsl,dma-queues = <2>;
717 status-sizes = <64>;
718 queue-sizes = <64 64>;
725 clock-names = "wdog_clk", "apb_pclk";
732 clock-names = "wdog_clk", "apb_pclk";
735 sai1: audio-controller@f100000 {
736 #sound-dai-cells = <0>;
737 compatible = "fsl,vf610-sai";
742 clock-names = "bus", "mclk1", "mclk2", "mclk3";
743 dma-names = "tx", "rx";
746 fsl,sai-asynchronous;
750 sai2: audio-controller@f110000 {
751 #sound-dai-cells = <0>;
752 compatible = "fsl,vf610-sai";
757 clock-names = "bus", "mclk1", "mclk2", "mclk3";
758 dma-names = "tx", "rx";
761 fsl,sai-asynchronous;
765 sai3: audio-controller@f120000 {
766 #sound-dai-cells = <0>;
767 compatible = "fsl,vf610-sai";
772 clock-names = "bus", "mclk1", "mclk2", "mclk3";
773 dma-names = "tx", "rx";
776 fsl,sai-asynchronous;
780 sai4: audio-controller@f130000 {
781 #sound-dai-cells = <0>;
782 compatible = "fsl,vf610-sai";
787 clock-names = "bus", "mclk1", "mclk2", "mclk3";
788 dma-names = "tx", "rx";
791 fsl,sai-asynchronous;
795 sai5: audio-controller@f140000 {
796 #sound-dai-cells = <0>;
797 compatible = "fsl,vf610-sai";
802 clock-names = "bus", "mclk1", "mclk2", "mclk3";
803 dma-names = "tx", "rx";
806 fsl,sai-asynchronous;
810 sai6: audio-controller@f150000 {
811 #sound-dai-cells = <0>;
812 compatible = "fsl,vf610-sai";
817 clock-names = "bus", "mclk1", "mclk2", "mclk3";
818 dma-names = "tx", "rx";
821 fsl,sai-asynchronous;
826 compatible = "fsl,qoriq-tmu";
829 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
830 fsl,tmu-calibration = <0x00000000 0x00000024
873 little-endian;
874 #thermal-sensor-cells = <1>;
878 compatible = "pci-host-ecam-generic";
880 #address-cells = <3>;
881 #size-cells = <2>;
882 msi-parent = <&its>;
884 bus-range = <0x0 0x0>;
885 dma-coherent;
886 msi-map = <0 &its 0x17 0xe>;
887 iommu-map = <0 &smmu 0x17 0xe>;
888 /* PF0-6 BAR0 - non-prefetchable memory */
890 /* PF0-6 BAR2 - prefetchable memory */
892 /* PF0: VF0-1 BAR0 - non-prefetchable memory */
894 /* PF0: VF0-1 BAR2 - prefetchable memory */
896 /* PF1: VF0-1 BAR0 - non-prefetchable memory */
898 /* PF1: VF0-1 BAR2 - prefetchable memory */
900 /* BAR4 (PF5) - non-prefetchable memory */
918 phy-mode = "internal";
921 fixed-link {
923 full-duplex;
928 compatible = "fsl,enetc-mdio";
930 #address-cells = <1>;
931 #size-cells = <0>;
935 compatible = "fsl,enetc-ptp";
938 little-endian;
939 fsl,extts-fifo;
942 mscc_felix: ethernet-switch@0,5 {
949 #address-cells = <1>;
950 #size-cells = <0>;
976 phy-mode = "internal";
979 fixed-link {
981 full-duplex;
987 phy-mode = "internal";
990 fixed-link {
992 full-duplex;
1001 phy-mode = "internal";
1004 fixed-link {
1006 full-duplex;
1011 rcpm: power-controller@1e34040 {
1012 compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
1014 #fsl,rcpm-wakeup-cells = <7>;
1015 little-endian;
1019 compatible = "fsl,ls1028a-ftm-alarm";
1021 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1027 compatible = "arm,mali-dp500";
1031 interrupt-names = "DE", "SE";
1034 clock-names = "pxlclk", "mclk", "aclk", "pclk";
1035 arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
1036 arm,malidp-arqos-value = <0xd000d000>;