Lines Matching +full:2 +full:c010000
17 #address-cells = <2>;
18 #size-cells = <2>;
36 #cooling-cells = <2>;
47 #cooling-cells = <2>;
102 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
104 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
106 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
108 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
119 #address-cells = <2>;
120 #size-cells = <2>;
188 #address-cells = <2>;
189 #size-cells = <2>;
220 #clock-cells = <2>;
355 dmas = <&edma0 0 54>, <&edma0 0 2>;
367 clocks = <&clockgen 2 1>;
380 clocks = <&clockgen 2 1>;
479 #dma-cells = <2>;
498 #gpio-cells = <2>;
500 #interrupt-cells = <2>;
509 #gpio-cells = <2>;
511 #interrupt-cells = <2>;
520 #gpio-cells = <2>;
522 #interrupt-cells = <2>;
565 #size-cells = <2>;
576 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
592 #size-cells = <2>;
603 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
716 fsl,dma-queues = <2>;
728 cluster1_core1_watchdog: watchdog@c010000 {
881 #size-cells = <2>;
915 enetc_port2: ethernet@0,2 {
963 mscc_felix_port2: port@2 {
964 reg = <2>;
1032 clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>,
1033 <&clockgen 2 2>;