Lines Matching +full:0 +full:x5000000
26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 clocks = <&clockgen 1 0>;
42 reg = <0x1>;
44 clocks = <&clockgen 1 0>;
65 arm,psci-suspend-param = <0x0>;
74 #clock-cells = <0>;
81 #clock-cells = <0>;
88 reg = <0x0 0xf1f0000 0x0 0xffff>;
89 #clock-cells = <0>;
96 offset = <0xb0>;
97 mask = <0x02>;
122 reg= <0x0 0x06000000 0 0x10000>, /* GIC Dist */
123 <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
126 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
131 reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
139 thermal-sensors = <&tmu 0>;
194 reg = <0x0 0x1080000 0x0 0x1000>;
201 reg = <0x0 0x1e00000 0x0 0x10000>;
207 reg = <0x0 0x1e60000 0x0 0x10000>;
213 reg = <0x0 0x1fc0000 0x0 0x10000>;
219 reg = <0x0 0x1300000 0x0 0xa0000>;
227 #size-cells = <0>;
228 reg = <0x0 0x2000000 0x0 0x10000>;
237 #size-cells = <0>;
238 reg = <0x0 0x2010000 0x0 0x10000>;
247 #size-cells = <0>;
248 reg = <0x0 0x2020000 0x0 0x10000>;
257 #size-cells = <0>;
258 reg = <0x0 0x2030000 0x0 0x10000>;
267 #size-cells = <0>;
268 reg = <0x0 0x2040000 0x0 0x10000>;
277 #size-cells = <0>;
278 reg = <0x0 0x2050000 0x0 0x10000>;
287 #size-cells = <0>;
288 reg = <0x0 0x2060000 0x0 0x10000>;
297 #size-cells = <0>;
298 reg = <0x0 0x2070000 0x0 0x10000>;
307 #size-cells = <0>;
308 reg = <0x0 0x20c0000 0x0 0x10000>,
309 <0x0 0x20000000 0x0 0x10000000>;
318 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
320 #size-cells = <0>;
321 reg = <0x0 0x2100000 0x0 0x10000>;
325 dmas = <&edma0 0 62>, <&edma0 0 60>;
333 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
335 #size-cells = <0>;
336 reg = <0x0 0x2110000 0x0 0x10000>;
340 dmas = <&edma0 0 58>, <&edma0 0 56>;
348 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
350 #size-cells = <0>;
351 reg = <0x0 0x2120000 0x0 0x10000>;
355 dmas = <&edma0 0 54>, <&edma0 0 2>;
364 reg = <0x0 0x2140000 0x0 0x10000>;
366 clock-frequency = <0>; /* fixed up by bootloader */
377 reg = <0x0 0x2150000 0x0 0x10000>;
379 clock-frequency = <0>; /* fixed up by bootloader */
391 reg = <0x00 0x21c0500 0x0 0x100>;
399 reg = <0x00 0x21c0600 0x0 0x100>;
408 reg = <0x0 0x2260000 0x0 0x1000>;
420 reg = <0x0 0x2270000 0x0 0x1000>;
432 reg = <0x0 0x2280000 0x0 0x1000>;
444 reg = <0x0 0x2290000 0x0 0x1000>;
456 reg = <0x0 0x22a0000 0x0 0x1000>;
468 reg = <0x0 0x22b0000 0x0 0x1000>;
481 reg = <0x0 0x22c0000 0x0 0x10000>,
482 <0x0 0x22d0000 0x0 0x10000>,
483 <0x0 0x22e0000 0x0 0x10000>;
495 reg = <0x0 0x2300000 0x0 0x10000>;
506 reg = <0x0 0x2310000 0x0 0x10000>;
517 reg = <0x0 0x2320000 0x0 0x10000>;
528 reg = <0x0 0x3100000 0x0 0x10000>;
532 snps,quirk-frame-length-adjustment = <0x20>;
538 reg = <0x0 0x3110000 0x0 0x10000>;
542 snps,quirk-frame-length-adjustment = <0x20>;
548 reg = <0x0 0x3200000 0x0 0x10000>,
549 <0x7 0x100520 0x0 0x4>;
558 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
559 0x80 0x00000000 0x0 0x00002000>; /* configuration space */
569 bus-range = <0x0 0xff>;
570 ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */
571 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
574 interrupt-map-mask = <0 0 0 7>;
575 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
576 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
577 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
578 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
579 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
585 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
586 0x88 0x00000000 0x0 0x00002000>; /* configuration space */
596 bus-range = <0x0 0xff>;
597 ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */
598 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
601 interrupt-map-mask = <0 0 0 7>;
602 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
603 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
604 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
605 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
606 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
612 reg = <0 0x5000000 0 0x800000>;
615 stream-match-mask = <0x7c00>;
624 /* performance counter interrupts 0-7 */
663 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
667 ranges = <0x0 0x00 0x8000000 0x100000>;
668 reg = <0x00 0x8000000 0x0 0x100000>;
673 compatible = "fsl,sec-v5.0-job-ring",
674 "fsl,sec-v4.0-job-ring";
675 reg = <0x10000 0x10000>;
680 compatible = "fsl,sec-v5.0-job-ring",
681 "fsl,sec-v4.0-job-ring";
682 reg = <0x20000 0x10000>;
687 compatible = "fsl,sec-v5.0-job-ring",
688 "fsl,sec-v4.0-job-ring";
689 reg = <0x30000 0x10000>;
694 compatible = "fsl,sec-v5.0-job-ring",
695 "fsl,sec-v4.0-job-ring";
696 reg = <0x40000 0x10000>;
703 reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
704 <0x0 0x8390000 0x0 0x10000>, /* Status regs */
705 <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
715 block-offset = <0x10000>;
723 reg = <0x0 0xc000000 0x0 0x1000>;
730 reg = <0x0 0xc010000 0x0 0x1000>;
736 #sound-dai-cells = <0>;
738 reg = <0x0 0xf100000 0x0 0x10000>;
751 #sound-dai-cells = <0>;
753 reg = <0x0 0xf110000 0x0 0x10000>;
766 #sound-dai-cells = <0>;
768 reg = <0x0 0xf120000 0x0 0x10000>;
781 #sound-dai-cells = <0>;
783 reg = <0x0 0xf130000 0x0 0x10000>;
796 #sound-dai-cells = <0>;
798 reg = <0x0 0xf140000 0x0 0x10000>;
811 #sound-dai-cells = <0>;
813 reg = <0x0 0xf150000 0x0 0x10000>;
827 reg = <0x0 0x1f80000 0x0 0x10000>;
828 interrupts = <0 23 0x4>;
829 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
830 fsl,tmu-calibration = <0x00000000 0x00000024
831 0x00000001 0x0000002b
832 0x00000002 0x00000031
833 0x00000003 0x00000038
834 0x00000004 0x0000003f
835 0x00000005 0x00000045
836 0x00000006 0x0000004c
837 0x00000007 0x00000053
838 0x00000008 0x00000059
839 0x00000009 0x00000060
840 0x0000000a 0x00000066
841 0x0000000b 0x0000006d
843 0x00010000 0x0000001c
844 0x00010001 0x00000024
845 0x00010002 0x0000002c
846 0x00010003 0x00000035
847 0x00010004 0x0000003d
848 0x00010005 0x00000045
849 0x00010006 0x0000004d
850 0x00010007 0x00000055
851 0x00010008 0x0000005e
852 0x00010009 0x00000066
853 0x0001000a 0x0000006e
855 0x00020000 0x00000018
856 0x00020001 0x00000022
857 0x00020002 0x0000002d
858 0x00020003 0x00000038
859 0x00020004 0x00000043
860 0x00020005 0x0000004d
861 0x00020006 0x00000058
862 0x00020007 0x00000063
863 0x00020008 0x0000006e
865 0x00030000 0x00000010
866 0x00030001 0x0000001c
867 0x00030002 0x00000029
868 0x00030003 0x00000036
869 0x00030004 0x00000042
870 0x00030005 0x0000004f
871 0x00030006 0x0000005b
872 0x00030007 0x00000068>;
879 reg = <0x01 0xf0000000 0x0 0x100000>;
884 bus-range = <0x0 0x0>;
886 msi-map = <0 &its 0x17 0xe>;
887 iommu-map = <0 &smmu 0x17 0xe>;
889 ranges = <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000
891 0xc2000000 0x0 0x00000000 0x1 0xf8160000 0x0 0x070000
893 0x82000000 0x0 0x00000000 0x1 0xf81d0000 0x0 0x020000
895 0xc2000000 0x0 0x00000000 0x1 0xf81f0000 0x0 0x020000
897 0x82000000 0x0 0x00000000 0x1 0xf8210000 0x0 0x020000
899 0xc2000000 0x0 0x00000000 0x1 0xf8230000 0x0 0x020000
901 0x82000000 0x0 0x00000000 0x1 0xfc000000 0x0 0x400000>;
903 enetc_port0: ethernet@0,0 {
905 reg = <0x000000 0 0 0 0>;
909 enetc_port1: ethernet@0,1 {
911 reg = <0x000100 0 0 0 0>;
915 enetc_port2: ethernet@0,2 {
917 reg = <0x000200 0 0 0 0>;
927 enetc_mdio_pf3: mdio@0,3 {
929 reg = <0x000300 0 0 0 0>;
931 #size-cells = <0>;
934 ethernet@0,4 {
936 reg = <0x000400 0 0 0 0>;
937 clocks = <&clockgen 4 0>;
942 mscc_felix: ethernet-switch@0,5 {
943 reg = <0x000500 0 0 0 0>;
950 #size-cells = <0>;
953 mscc_felix_port0: port@0 {
954 reg = <0>;
998 enetc_port3: ethernet@0,6 {
1000 reg = <0x000600 0 0 0 0>;
1013 reg = <0x0 0x1e34040 0x0 0x1c>;
1020 reg = <0x0 0x2800000 0x0 0x10000>;
1021 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1028 reg = <0x0 0xf080000 0x0 0x10000>;
1029 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
1030 <0 223 IRQ_TYPE_LEVEL_HIGH>;
1036 arm,malidp-arqos-value = <0xd000d000>;