Lines Matching +full:vf610 +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
22 rtic-a = &rtic_a;
23 rtic-b = &rtic_b;
24 rtic-c = &rtic_c;
25 rtic-d = &rtic_d;
26 sec-mon = &sec_mon;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a53";
38 #cooling-cells = <2>;
39 cpu-idle-states = <&CPU_PH20>;
43 idle-states {
45 * PSCI node is not added default, U-boot will add missing
48 entry-method = "psci";
50 CPU_PH20: cpu-ph20 {
51 compatible = "arm,idle-state";
52 idle-state-name = "PH20";
53 arm,psci-suspend-param = <0x0>;
54 entry-latency-us = <1000>;
55 exit-latency-us = <1000>;
56 min-residency-us = <3000>;
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <125000000>;
64 clock-output-names = "sysclk";
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <100000000>;
71 clock-output-names = "coreclk";
75 compatible = "arm,armv8-timer";
77 <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
83 compatible = "arm,armv8-pmuv3";
87 gic: interrupt-controller@1400000 {
88 compatible = "arm,gic-400";
89 #interrupt-cells = <3>;
90 interrupt-controller;
99 compatible = "syscon-reboot";
105 thermal-zones {
106 cpu_thermal: cpu-thermal {
107 polling-delay-passive = <1000>;
108 polling-delay = <5000>;
109 thermal-sensors = <&tmu 0>;
112 cpu_alert: cpu-alert {
118 cpu_crit: cpu-crit {
125 cooling-maps {
128 cooling-device =
137 compatible = "simple-bus";
138 #address-cells = <2>;
139 #size-cells = <2>;
143 compatible = "fsl,ls1021a-qspi";
144 #address-cells = <1>;
145 #size-cells = <0>;
148 reg-names = "QuadSPI", "QuadSPI-memory";
150 clock-names = "qspi_en", "qspi";
156 compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
160 voltage-ranges = <1800 1800 3300 3300>;
161 sdhci,auto-cmd12;
162 big-endian;
163 bus-width = <4>;
168 compatible = "fsl,ls1012a-scfg", "syscon";
170 big-endian;
174 compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
178 voltage-ranges = <1800 1800 3300 3300>;
179 sdhci,auto-cmd12;
180 big-endian;
181 broken-cd;
182 bus-width = <4>;
187 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
188 "fsl,sec-v4.0";
189 fsl,sec-era = <8>;
190 #address-cells = <1>;
191 #size-cells = <1>;
197 compatible = "fsl,sec-v5.4-job-ring",
198 "fsl,sec-v5.0-job-ring",
199 "fsl,sec-v4.0-job-ring";
205 compatible = "fsl,sec-v5.4-job-ring",
206 "fsl,sec-v5.0-job-ring",
207 "fsl,sec-v4.0-job-ring";
213 compatible = "fsl,sec-v5.4-job-ring",
214 "fsl,sec-v5.0-job-ring",
215 "fsl,sec-v4.0-job-ring";
221 compatible = "fsl,sec-v5.4-job-ring",
222 "fsl,sec-v5.0-job-ring",
223 "fsl,sec-v4.0-job-ring";
229 compatible = "fsl,sec-v5.4-rtic",
230 "fsl,sec-v5.0-rtic",
231 "fsl,sec-v4.0-rtic";
232 #address-cells = <1>;
233 #size-cells = <1>;
237 rtic_a: rtic-a@0 {
238 compatible = "fsl,sec-v5.4-rtic-memory",
239 "fsl,sec-v5.0-rtic-memory",
240 "fsl,sec-v4.0-rtic-memory";
244 rtic_b: rtic-b@20 {
245 compatible = "fsl,sec-v5.4-rtic-memory",
246 "fsl,sec-v5.0-rtic-memory",
247 "fsl,sec-v4.0-rtic-memory";
251 rtic_c: rtic-c@40 {
252 compatible = "fsl,sec-v5.4-rtic-memory",
253 "fsl,sec-v5.0-rtic-memory",
254 "fsl,sec-v4.0-rtic-memory";
258 rtic_d: rtic-d@60 {
259 compatible = "fsl,sec-v5.4-rtic-memory",
260 "fsl,sec-v5.0-rtic-memory",
261 "fsl,sec-v4.0-rtic-memory";
268 compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
269 "fsl,sec-v4.0-mon";
276 compatible = "fsl,ls1012a-dcfg",
279 big-endian;
283 compatible = "fsl,ls1012a-clockgen";
285 #clock-cells = <2>;
287 clock-names = "sysclk", "coreclk";
291 compatible = "fsl,qoriq-tmu";
294 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
295 fsl,tmu-calibration = <0x00000000 0x00000026
331 big-endian;
332 #thermal-sensor-cells = <1>;
335 i2c0: i2c@2180000 {
336 compatible = "fsl,vf610-i2c";
337 #address-cells = <1>;
338 #size-cells = <0>;
345 i2c1: i2c@2190000 {
346 compatible = "fsl,vf610-i2c";
347 #address-cells = <1>;
348 #size-cells = <0>;
356 compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
357 #address-cells = <1>;
358 #size-cells = <0>;
361 clock-names = "dspi";
363 spi-num-chipselects = <5>;
364 big-endian;
385 compatible = "fsl,qoriq-gpio";
388 gpio-controller;
389 #gpio-cells = <2>;
390 interrupt-controller;
391 #interrupt-cells = <2>;
395 compatible = "fsl,qoriq-gpio";
398 gpio-controller;
399 #gpio-cells = <2>;
400 interrupt-controller;
401 #interrupt-cells = <2>;
405 compatible = "fsl,ls1012a-wdt",
406 "fsl,imx21-wdt";
410 big-endian;
414 #sound-dai-cells = <0>;
415 compatible = "fsl,vf610-sai";
420 clock-names = "bus", "mclk1", "mclk2", "mclk3";
421 dma-names = "tx", "rx";
428 #sound-dai-cells = <0>;
429 compatible = "fsl,vf610-sai";
434 clock-names = "bus", "mclk1", "mclk2", "mclk3";
435 dma-names = "tx", "rx";
442 #dma-cells = <2>;
443 compatible = "fsl,vf610-edma";
449 interrupt-names = "edma-tx", "edma-err";
450 dma-channels = <32>;
451 big-endian;
452 clock-names = "dmamux0", "dmamux1";
462 snps,quirk-frame-length-adjustment = <0x20>;
464 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
468 compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
471 reg-names = "ahci", "sata-ecc";
474 dma-coherent;
479 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
486 msi: msi-controller1@1572000 {
487 compatible = "fsl,ls1012a-msi";
489 msi-controller;
494 compatible = "fsl,ls1012a-pcie";
497 reg-names = "regs", "config";
500 interrupt-names = "aer", "pme";
501 #address-cells = <3>;
502 #size-cells = <2>;
504 num-viewport = <2>;
505 bus-range = <0x0 0xff>;
507 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
508 msi-parent = <&msi>;
509 #interrupt-cells = <1>;
510 interrupt-map-mask = <0 0 0 7>;
511 interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
518 rcpm: power-controller@1ee2140 {
519 compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1+";
521 #fsl,rcpm-wakeup-cells = <1>;
525 compatible = "fsl,ls1012a-ftm-alarm";
527 fsl,rcpm-wakeup = <&rcpm 0x20000>;
529 big-endian;
535 compatible = "linaro,optee-tz";