Lines Matching +full:opp +full:- +full:400000000
1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
36 compatible = "arm,cortex-a57-pmu";
41 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
46 compatible = "fixed-clock";
47 clock-output-names = "oscclk";
48 #clock-cells = <0>;
52 #address-cells = <1>;
53 #size-cells = <0>;
57 compatible = "arm,cortex-a53";
58 enable-method = "psci";
60 clock-frequency = <1300000000>;
62 clock-names = "apolloclk";
63 operating-points-v2 = <&cluster_a53_opp_table>;
64 #cooling-cells = <2>;
69 compatible = "arm,cortex-a53";
70 enable-method = "psci";
72 clock-frequency = <1300000000>;
73 operating-points-v2 = <&cluster_a53_opp_table>;
74 #cooling-cells = <2>;
79 compatible = "arm,cortex-a53";
80 enable-method = "psci";
82 clock-frequency = <1300000000>;
83 operating-points-v2 = <&cluster_a53_opp_table>;
84 #cooling-cells = <2>;
89 compatible = "arm,cortex-a53";
90 enable-method = "psci";
92 clock-frequency = <1300000000>;
93 operating-points-v2 = <&cluster_a53_opp_table>;
94 #cooling-cells = <2>;
99 compatible = "arm,cortex-a57";
100 enable-method = "psci";
102 clock-frequency = <1900000000>;
104 clock-names = "atlasclk";
105 operating-points-v2 = <&cluster_a57_opp_table>;
106 #cooling-cells = <2>;
111 compatible = "arm,cortex-a57";
112 enable-method = "psci";
114 clock-frequency = <1900000000>;
115 operating-points-v2 = <&cluster_a57_opp_table>;
116 #cooling-cells = <2>;
121 compatible = "arm,cortex-a57";
122 enable-method = "psci";
124 clock-frequency = <1900000000>;
125 operating-points-v2 = <&cluster_a57_opp_table>;
126 #cooling-cells = <2>;
131 compatible = "arm,cortex-a57";
132 enable-method = "psci";
134 clock-frequency = <1900000000>;
135 operating-points-v2 = <&cluster_a57_opp_table>;
136 #cooling-cells = <2>;
141 compatible = "operating-points-v2";
142 opp-shared;
144 opp-400000000 {
145 opp-hz = /bits/ 64 <400000000>;
146 opp-microvolt = <900000>;
148 opp-500000000 {
149 opp-hz = /bits/ 64 <500000000>;
150 opp-microvolt = <925000>;
152 opp-600000000 {
153 opp-hz = /bits/ 64 <600000000>;
154 opp-microvolt = <950000>;
156 opp-700000000 {
157 opp-hz = /bits/ 64 <700000000>;
158 opp-microvolt = <975000>;
160 opp-800000000 {
161 opp-hz = /bits/ 64 <800000000>;
162 opp-microvolt = <1000000>;
164 opp-900000000 {
165 opp-hz = /bits/ 64 <900000000>;
166 opp-microvolt = <1050000>;
168 opp-1000000000 {
169 opp-hz = /bits/ 64 <1000000000>;
170 opp-microvolt = <1075000>;
172 opp-1100000000 {
173 opp-hz = /bits/ 64 <1100000000>;
174 opp-microvolt = <1112500>;
176 opp-1200000000 {
177 opp-hz = /bits/ 64 <1200000000>;
178 opp-microvolt = <1112500>;
180 opp-1300000000 {
181 opp-hz = /bits/ 64 <1300000000>;
182 opp-microvolt = <1150000>;
187 compatible = "operating-points-v2";
188 opp-shared;
190 opp-500000000 {
191 opp-hz = /bits/ 64 <500000000>;
192 opp-microvolt = <900000>;
194 opp-600000000 {
195 opp-hz = /bits/ 64 <600000000>;
196 opp-microvolt = <900000>;
198 opp-700000000 {
199 opp-hz = /bits/ 64 <700000000>;
200 opp-microvolt = <912500>;
202 opp-800000000 {
203 opp-hz = /bits/ 64 <800000000>;
204 opp-microvolt = <912500>;
206 opp-900000000 {
207 opp-hz = /bits/ 64 <900000000>;
208 opp-microvolt = <937500>;
210 opp-1000000000 {
211 opp-hz = /bits/ 64 <1000000000>;
212 opp-microvolt = <975000>;
214 opp-1100000000 {
215 opp-hz = /bits/ 64 <1100000000>;
216 opp-microvolt = <1012500>;
218 opp-1200000000 {
219 opp-hz = /bits/ 64 <1200000000>;
220 opp-microvolt = <1037500>;
222 opp-1300000000 {
223 opp-hz = /bits/ 64 <1300000000>;
224 opp-microvolt = <1062500>;
226 opp-1400000000 {
227 opp-hz = /bits/ 64 <1400000000>;
228 opp-microvolt = <1087500>;
230 opp-1500000000 {
231 opp-hz = /bits/ 64 <1500000000>;
232 opp-microvolt = <1125000>;
234 opp-1600000000 {
235 opp-hz = /bits/ 64 <1600000000>;
236 opp-microvolt = <1137500>;
238 opp-1700000000 {
239 opp-hz = /bits/ 64 <1700000000>;
240 opp-microvolt = <1175000>;
242 opp-1800000000 {
243 opp-hz = /bits/ 64 <1800000000>;
244 opp-microvolt = <1212500>;
246 opp-1900000000 {
247 opp-hz = /bits/ 64 <1900000000>;
248 opp-microvolt = <1262500>;
260 compatible = "simple-bus";
261 #address-cells = <1>;
262 #size-cells = <1>;
266 compatible = "samsung,exynos4210-chipid";
270 cmu_top: clock-controller@10030000 {
271 compatible = "samsung,exynos5433-cmu-top";
273 #clock-cells = <1>;
275 clock-names = "oscclk",
285 cmu_cpif: clock-controller@10fc0000 {
286 compatible = "samsung,exynos5433-cmu-cpif";
288 #clock-cells = <1>;
290 clock-names = "oscclk";
294 cmu_mif: clock-controller@105b0000 {
295 compatible = "samsung,exynos5433-cmu-mif";
297 #clock-cells = <1>;
299 clock-names = "oscclk",
305 cmu_peric: clock-controller@14c80000 {
306 compatible = "samsung,exynos5433-cmu-peric";
308 #clock-cells = <1>;
311 cmu_peris: clock-controller@10040000 {
312 compatible = "samsung,exynos5433-cmu-peris";
314 #clock-cells = <1>;
317 cmu_fsys: clock-controller@156e0000 {
318 compatible = "samsung,exynos5433-cmu-fsys";
320 #clock-cells = <1>;
322 clock-names = "oscclk",
344 cmu_g2d: clock-controller@12460000 {
345 compatible = "samsung,exynos5433-cmu-g2d";
347 #clock-cells = <1>;
349 clock-names = "oscclk",
355 power-domains = <&pd_g2d>;
358 cmu_disp: clock-controller@13b90000 {
359 compatible = "samsung,exynos5433-cmu-disp";
361 #clock-cells = <1>;
363 clock-names = "oscclk",
381 power-domains = <&pd_disp>;
384 cmu_aud: clock-controller@114c0000 {
385 compatible = "samsung,exynos5433-cmu-aud";
387 #clock-cells = <1>;
388 clock-names = "oscclk", "fout_aud_pll";
390 power-domains = <&pd_aud>;
393 cmu_bus0: clock-controller@13600000 {
394 compatible = "samsung,exynos5433-cmu-bus0";
396 #clock-cells = <1>;
398 clock-names = "aclk_bus0_400";
402 cmu_bus1: clock-controller@14800000 {
403 compatible = "samsung,exynos5433-cmu-bus1";
405 #clock-cells = <1>;
407 clock-names = "aclk_bus1_400";
411 cmu_bus2: clock-controller@13400000 {
412 compatible = "samsung,exynos5433-cmu-bus2";
414 #clock-cells = <1>;
416 clock-names = "oscclk", "aclk_bus2_400";
420 cmu_g3d: clock-controller@14aa0000 {
421 compatible = "samsung,exynos5433-cmu-g3d";
423 #clock-cells = <1>;
425 clock-names = "oscclk", "aclk_g3d_400";
427 power-domains = <&pd_g3d>;
430 cmu_gscl: clock-controller@13cf0000 {
431 compatible = "samsung,exynos5433-cmu-gscl";
433 #clock-cells = <1>;
435 clock-names = "oscclk",
441 power-domains = <&pd_gscl>;
444 cmu_apollo: clock-controller@11900000 {
445 compatible = "samsung,exynos5433-cmu-apollo";
447 #clock-cells = <1>;
449 clock-names = "oscclk", "sclk_bus_pll_apollo";
453 cmu_atlas: clock-controller@11800000 {
454 compatible = "samsung,exynos5433-cmu-atlas";
456 #clock-cells = <1>;
458 clock-names = "oscclk", "sclk_bus_pll_atlas";
462 cmu_mscl: clock-controller@150d0000 {
463 compatible = "samsung,exynos5433-cmu-mscl";
465 #clock-cells = <1>;
467 clock-names = "oscclk",
473 power-domains = <&pd_mscl>;
476 cmu_mfc: clock-controller@15280000 {
477 compatible = "samsung,exynos5433-cmu-mfc";
479 #clock-cells = <1>;
481 clock-names = "oscclk", "aclk_mfc_400";
483 power-domains = <&pd_mfc>;
486 cmu_hevc: clock-controller@14f80000 {
487 compatible = "samsung,exynos5433-cmu-hevc";
489 #clock-cells = <1>;
491 clock-names = "oscclk", "aclk_hevc_400";
493 power-domains = <&pd_hevc>;
496 cmu_isp: clock-controller@146d0000 {
497 compatible = "samsung,exynos5433-cmu-isp";
499 #clock-cells = <1>;
501 clock-names = "oscclk",
507 power-domains = <&pd_isp>;
510 cmu_cam0: clock-controller@120d0000 {
511 compatible = "samsung,exynos5433-cmu-cam0";
513 #clock-cells = <1>;
515 clock-names = "oscclk",
523 power-domains = <&pd_cam0>;
526 cmu_cam1: clock-controller@145d0000 {
527 compatible = "samsung,exynos5433-cmu-cam1";
529 #clock-cells = <1>;
531 clock-names = "oscclk",
545 power-domains = <&pd_cam1>;
548 cmu_imem: clock-controller@11060000 {
549 compatible = "samsung,exynos5433-cmu-imem";
551 #clock-cells = <1>;
553 clock-names = "oscclk",
563 slim_sss: slim-sss@11140000 {
564 compatible = "samsung,exynos5433-slim-sss";
567 clock-names = "aclk", "pclk";
572 pd_gscl: power-domain@105c4000 {
573 compatible = "samsung,exynos5433-pd";
575 #power-domain-cells = <0>;
579 pd_cam0: power-domain@105c4020 {
580 compatible = "samsung,exynos5433-pd";
582 #power-domain-cells = <0>;
583 power-domains = <&pd_cam1>;
587 pd_mscl: power-domain@105c4040 {
588 compatible = "samsung,exynos5433-pd";
590 #power-domain-cells = <0>;
594 pd_g3d: power-domain@105c4060 {
595 compatible = "samsung,exynos5433-pd";
597 #power-domain-cells = <0>;
601 pd_disp: power-domain@105c4080 {
602 compatible = "samsung,exynos5433-pd";
604 #power-domain-cells = <0>;
608 pd_cam1: power-domain@105c40a0 {
609 compatible = "samsung,exynos5433-pd";
611 #power-domain-cells = <0>;
615 pd_aud: power-domain@105c40c0 {
616 compatible = "samsung,exynos5433-pd";
618 #power-domain-cells = <0>;
622 pd_g2d: power-domain@105c4120 {
623 compatible = "samsung,exynos5433-pd";
625 #power-domain-cells = <0>;
629 pd_isp: power-domain@105c4140 {
630 compatible = "samsung,exynos5433-pd";
632 #power-domain-cells = <0>;
633 power-domains = <&pd_cam0>;
637 pd_mfc: power-domain@105c4180 {
638 compatible = "samsung,exynos5433-pd";
640 #power-domain-cells = <0>;
644 pd_hevc: power-domain@105c41c0 {
645 compatible = "samsung,exynos5433-pd";
647 #power-domain-cells = <0>;
652 compatible = "samsung,exynos5433-tmu";
657 clock-names = "tmu_apbif", "tmu_sclk";
658 #thermal-sensor-cells = <0>;
663 compatible = "samsung,exynos5433-tmu";
668 clock-names = "tmu_apbif", "tmu_sclk";
669 #thermal-sensor-cells = <0>;
674 compatible = "samsung,exynos5433-tmu";
679 clock-names = "tmu_apbif", "tmu_sclk";
680 #thermal-sensor-cells = <0>;
685 compatible = "samsung,exynos5433-tmu";
690 clock-names = "tmu_apbif", "tmu_sclk";
691 #thermal-sensor-cells = <0>;
696 compatible = "samsung,exynos5433-tmu";
701 clock-names = "tmu_apbif", "tmu_sclk";
702 #thermal-sensor-cells = <0>;
707 compatible = "samsung,exynos4210-mct";
722 clock-names = "fin_pll", "mct";
726 compatible = "samsung,exynos-ppmu-v2";
732 compatible = "samsung,exynos-ppmu-v2";
738 compatible = "samsung,exynos-ppmu-v2";
744 compatible = "samsung,exynos-ppmu-v2";
750 compatible = "samsung,exynos5433-pinctrl";
753 wakeup-interrupt-controller {
754 compatible = "samsung,exynos7-wakeup-eint";
760 compatible = "samsung,exynos5433-pinctrl";
763 power-domains = <&pd_aud>;
767 compatible = "samsung,exynos5433-pinctrl";
773 compatible = "samsung,exynos5433-pinctrl";
779 compatible = "samsung,exynos5433-pinctrl";
785 compatible = "samsung,exynos5433-pinctrl";
791 compatible = "samsung,exynos5433-pinctrl";
797 compatible = "samsung,exynos5433-pinctrl";
803 compatible = "samsung,exynos5433-pinctrl";
809 compatible = "samsung,exynos5433-pinctrl";
814 pmu_system_controller: system-controller@105c0000 {
815 compatible = "samsung,exynos5433-pmu", "syscon";
817 #clock-cells = <1>;
818 clock-names = "clkout16";
821 reboot: syscon-reboot {
822 compatible = "syscon-reboot";
829 gic: interrupt-controller@11001000 {
830 compatible = "arm,gic-400";
831 #interrupt-cells = <3>;
832 interrupt-controller;
840 mipi_phy: video-phy {
841 compatible = "samsung,exynos5433-mipi-video-phy";
842 #phy-cells = <1>;
843 samsung,pmu-syscon = <&pmu_system_controller>;
844 samsung,cam0-sysreg = <&syscon_cam0>;
845 samsung,cam1-sysreg = <&syscon_cam1>;
846 samsung,disp-sysreg = <&syscon_disp>;
850 compatible = "samsung,exynos5433-decon";
863 clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
868 power-domains = <&pd_disp>;
869 interrupt-names = "fifo", "vsync", "lcd_sys";
873 samsung,disp-sysreg = <&syscon_disp>;
876 iommu-names = "m0", "m1";
879 #address-cells = <1>;
880 #size-cells = <0>;
885 remote-endpoint =
893 compatible = "samsung,exynos5433-decon-tv";
906 clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
911 samsung,disp-sysreg = <&syscon_disp>;
912 power-domains = <&pd_disp>;
913 interrupt-names = "fifo", "vsync", "lcd_sys";
919 iommu-names = "m0", "m1";
923 compatible = "samsung,exynos5433-mipi-dsi";
927 phy-names = "dsim";
933 clock-names = "bus_clk",
938 power-domains = <&pd_disp>;
940 #address-cells = <1>;
941 #size-cells = <0>;
944 #address-cells = <1>;
945 #size-cells = <0>;
950 remote-endpoint = <&mic_to_dsi>;
957 compatible = "samsung,exynos5433-mic";
961 clock-names = "pclk_mic0", "sclk_rgb_vclk_to_mic0";
962 power-domains = <&pd_disp>;
963 samsung,disp-syscon = <&syscon_disp>;
967 #address-cells = <1>;
968 #size-cells = <0>;
973 remote-endpoint =
981 remote-endpoint = <&dsi_to_mic>;
988 compatible = "samsung,exynos5433-hdmi";
1000 clock-names = "hdmi_pclk", "hdmi_i_pclk",
1007 samsung,syscon-phandle = <&pmu_system_controller>;
1008 samsung,sysreg-phandle = <&syscon_disp>;
1009 #sound-dai-cells = <0>;
1018 compatible = "samsung,exynos5433-sysreg", "syscon";
1023 compatible = "samsung,exynos5433-sysreg", "syscon";
1028 compatible = "samsung,exynos5433-sysreg", "syscon";
1032 gsc_0: video-scaler@13c00000 {
1033 compatible = "samsung,exynos5433-gsc";
1036 clock-names = "pclk", "aclk", "aclk_xiu",
1044 power-domains = <&pd_gscl>;
1047 gsc_1: video-scaler@13c10000 {
1048 compatible = "samsung,exynos5433-gsc";
1051 clock-names = "pclk", "aclk", "aclk_xiu",
1059 power-domains = <&pd_gscl>;
1062 gsc_2: video-scaler@13c20000 {
1063 compatible = "samsung,exynos5433-gsc";
1066 clock-names = "pclk", "aclk", "aclk_xiu",
1074 power-domains = <&pd_gscl>;
1078 compatible = "samsung,exynos5433-mali", "arm,mali-t760";
1083 interrupt-names = "job", "mmu", "gpu";
1085 clock-names = "core";
1086 power-domains = <&pd_g3d>;
1087 operating-points-v2 = <&gpu_opp_table>;
1090 gpu_opp_table: opp-table {
1091 compatible = "operating-points-v2";
1093 opp-160000000 {
1094 opp-hz = /bits/ 64 <160000000>;
1095 opp-microvolt = <1000000>;
1097 opp-267000000 {
1098 opp-hz = /bits/ 64 <267000000>;
1099 opp-microvolt = <1000000>;
1101 opp-350000000 {
1102 opp-hz = /bits/ 64 <350000000>;
1103 opp-microvolt = <1025000>;
1105 opp-420000000 {
1106 opp-hz = /bits/ 64 <420000000>;
1107 opp-microvolt = <1025000>;
1109 opp-500000000 {
1110 opp-hz = /bits/ 64 <500000000>;
1111 opp-microvolt = <1075000>;
1113 opp-550000000 {
1114 opp-hz = /bits/ 64 <550000000>;
1115 opp-microvolt = <1125000>;
1117 opp-600000000 {
1118 opp-hz = /bits/ 64 <600000000>;
1119 opp-microvolt = <1150000>;
1121 opp-700000000 {
1122 opp-hz = /bits/ 64 <700000000>;
1123 opp-microvolt = <1150000>;
1129 compatible = "samsung,exynos5433-scaler";
1132 clock-names = "pclk", "aclk", "aclk_xiu";
1137 power-domains = <&pd_mscl>;
1141 compatible = "samsung,exynos5433-scaler";
1144 clock-names = "pclk", "aclk", "aclk_xiu";
1149 power-domains = <&pd_mscl>;
1153 compatible = "samsung,exynos5433-jpeg";
1156 clock-names = "pclk", "aclk", "aclk_xiu", "sclk";
1162 power-domains = <&pd_mscl>;
1166 compatible = "samsung,exynos5433-mfc";
1169 clock-names = "pclk", "aclk", "aclk_xiu";
1174 iommu-names = "left", "right";
1175 power-domains = <&pd_mfc>;
1179 compatible = "samsung,exynos-sysmmu";
1182 clock-names = "aclk", "pclk";
1185 power-domains = <&pd_disp>;
1186 #iommu-cells = <0>;
1190 compatible = "samsung,exynos-sysmmu";
1193 clock-names = "aclk", "pclk";
1196 #iommu-cells = <0>;
1197 power-domains = <&pd_disp>;
1201 compatible = "samsung,exynos-sysmmu";
1204 clock-names = "aclk", "pclk";
1207 #iommu-cells = <0>;
1208 power-domains = <&pd_disp>;
1212 compatible = "samsung,exynos-sysmmu";
1215 clock-names = "aclk", "pclk";
1218 #iommu-cells = <0>;
1219 power-domains = <&pd_disp>;
1223 compatible = "samsung,exynos-sysmmu";
1226 clock-names = "aclk", "pclk";
1229 #iommu-cells = <0>;
1230 power-domains = <&pd_gscl>;
1234 compatible = "samsung,exynos-sysmmu";
1237 clock-names = "aclk", "pclk";
1240 #iommu-cells = <0>;
1241 power-domains = <&pd_gscl>;
1245 compatible = "samsung,exynos-sysmmu";
1248 clock-names = "aclk", "pclk";
1251 #iommu-cells = <0>;
1252 power-domains = <&pd_gscl>;
1256 compatible = "samsung,exynos-sysmmu";
1259 clock-names = "aclk", "pclk";
1262 #iommu-cells = <0>;
1263 power-domains = <&pd_mscl>;
1267 compatible = "samsung,exynos-sysmmu";
1270 clock-names = "aclk", "pclk";
1273 #iommu-cells = <0>;
1274 power-domains = <&pd_mscl>;
1278 compatible = "samsung,exynos-sysmmu";
1281 clock-names = "aclk", "pclk";
1284 #iommu-cells = <0>;
1285 power-domains = <&pd_mscl>;
1289 compatible = "samsung,exynos-sysmmu";
1292 clock-names = "aclk", "pclk";
1295 #iommu-cells = <0>;
1296 power-domains = <&pd_mfc>;
1300 compatible = "samsung,exynos-sysmmu";
1303 clock-names = "aclk", "pclk";
1306 #iommu-cells = <0>;
1307 power-domains = <&pd_mfc>;
1311 compatible = "samsung,exynos5433-uart";
1316 clock-names = "uart", "clk_uart_baud0";
1317 pinctrl-names = "default";
1318 pinctrl-0 = <&uart0_bus>;
1323 compatible = "samsung,exynos5433-uart";
1328 clock-names = "uart", "clk_uart_baud0";
1329 pinctrl-names = "default";
1330 pinctrl-0 = <&uart1_bus>;
1335 compatible = "samsung,exynos5433-uart";
1340 clock-names = "uart", "clk_uart_baud0";
1341 pinctrl-names = "default";
1342 pinctrl-0 = <&uart2_bus>;
1347 compatible = "samsung,exynos5433-spi";
1351 dma-names = "tx", "rx";
1352 #address-cells = <1>;
1353 #size-cells = <0>;
1357 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1358 samsung,spi-src-clk = <0>;
1359 pinctrl-names = "default";
1360 pinctrl-0 = <&spi0_bus>;
1361 num-cs = <1>;
1366 compatible = "samsung,exynos5433-spi";
1370 dma-names = "tx", "rx";
1371 #address-cells = <1>;
1372 #size-cells = <0>;
1376 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1377 samsung,spi-src-clk = <0>;
1378 pinctrl-names = "default";
1379 pinctrl-0 = <&spi1_bus>;
1380 num-cs = <1>;
1385 compatible = "samsung,exynos5433-spi";
1389 dma-names = "tx", "rx";
1390 #address-cells = <1>;
1391 #size-cells = <0>;
1395 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1396 samsung,spi-src-clk = <0>;
1397 pinctrl-names = "default";
1398 pinctrl-0 = <&spi2_bus>;
1399 num-cs = <1>;
1404 compatible = "samsung,exynos5433-spi";
1408 dma-names = "tx", "rx";
1409 #address-cells = <1>;
1410 #size-cells = <0>;
1414 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1415 samsung,spi-src-clk = <0>;
1416 pinctrl-names = "default";
1417 pinctrl-0 = <&spi3_bus>;
1418 num-cs = <1>;
1423 compatible = "samsung,exynos5433-spi";
1427 dma-names = "tx", "rx";
1428 #address-cells = <1>;
1429 #size-cells = <0>;
1433 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1434 samsung,spi-src-clk = <0>;
1435 pinctrl-names = "default";
1436 pinctrl-0 = <&spi4_bus>;
1437 num-cs = <1>;
1442 compatible = "samsung,exynos7-adc";
1445 clock-names = "adc";
1447 #io-channel-cells = <1>;
1448 io-channel-ranges;
1453 compatible = "samsung,exynos7-i2s";
1456 dma-names = "tx", "rx";
1461 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
1462 #clock-cells = <1>;
1463 #sound-dai-cells = <1>;
1468 compatible = "samsung,exynos4210-pwm";
1475 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
1477 clock-names = "timers";
1478 #pwm-cells = <3>;
1483 compatible = "samsung,exynos7-hsi2c";
1486 #address-cells = <1>;
1487 #size-cells = <0>;
1488 pinctrl-names = "default";
1489 pinctrl-0 = <&hs_i2c0_bus>;
1491 clock-names = "hsi2c";
1496 compatible = "samsung,exynos7-hsi2c";
1499 #address-cells = <1>;
1500 #size-cells = <0>;
1501 pinctrl-names = "default";
1502 pinctrl-0 = <&hs_i2c1_bus>;
1504 clock-names = "hsi2c";
1509 compatible = "samsung,exynos7-hsi2c";
1512 #address-cells = <1>;
1513 #size-cells = <0>;
1514 pinctrl-names = "default";
1515 pinctrl-0 = <&hs_i2c2_bus>;
1517 clock-names = "hsi2c";
1522 compatible = "samsung,exynos7-hsi2c";
1525 #address-cells = <1>;
1526 #size-cells = <0>;
1527 pinctrl-names = "default";
1528 pinctrl-0 = <&hs_i2c3_bus>;
1530 clock-names = "hsi2c";
1535 compatible = "samsung,exynos7-hsi2c";
1538 #address-cells = <1>;
1539 #size-cells = <0>;
1540 pinctrl-names = "default";
1541 pinctrl-0 = <&hs_i2c4_bus>;
1543 clock-names = "hsi2c";
1548 compatible = "samsung,exynos7-hsi2c";
1551 #address-cells = <1>;
1552 #size-cells = <0>;
1553 pinctrl-names = "default";
1554 pinctrl-0 = <&hs_i2c5_bus>;
1556 clock-names = "hsi2c";
1561 compatible = "samsung,exynos7-hsi2c";
1564 #address-cells = <1>;
1565 #size-cells = <0>;
1566 pinctrl-names = "default";
1567 pinctrl-0 = <&hs_i2c6_bus>;
1569 clock-names = "hsi2c";
1574 compatible = "samsung,exynos7-hsi2c";
1577 #address-cells = <1>;
1578 #size-cells = <0>;
1579 pinctrl-names = "default";
1580 pinctrl-0 = <&hs_i2c7_bus>;
1582 clock-names = "hsi2c";
1587 compatible = "samsung,exynos7-hsi2c";
1590 #address-cells = <1>;
1591 #size-cells = <0>;
1592 pinctrl-names = "default";
1593 pinctrl-0 = <&hs_i2c8_bus>;
1595 clock-names = "hsi2c";
1600 compatible = "samsung,exynos7-hsi2c";
1603 #address-cells = <1>;
1604 #size-cells = <0>;
1605 pinctrl-names = "default";
1606 pinctrl-0 = <&hs_i2c9_bus>;
1608 clock-names = "hsi2c";
1613 compatible = "samsung,exynos7-hsi2c";
1616 #address-cells = <1>;
1617 #size-cells = <0>;
1618 pinctrl-names = "default";
1619 pinctrl-0 = <&hs_i2c10_bus>;
1621 clock-names = "hsi2c";
1626 compatible = "samsung,exynos7-hsi2c";
1629 #address-cells = <1>;
1630 #size-cells = <0>;
1631 pinctrl-names = "default";
1632 pinctrl-0 = <&hs_i2c11_bus>;
1634 clock-names = "hsi2c";
1639 compatible = "samsung,exynos5433-dwusb3";
1644 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1645 #address-cells = <1>;
1646 #size-cells = <1>;
1655 clock-names = "ref", "bus_early", "suspend";
1659 phy-names = "usb2-phy", "usb3-phy";
1664 compatible = "samsung,exynos5433-usbdrd-phy";
1670 clock-names = "phy", "ref", "phy_utmi", "phy_pipe",
1672 #phy-cells = <1>;
1673 samsung,pmu-syscon = <&pmu_system_controller>;
1678 compatible = "samsung,exynos5433-usbdrd-phy";
1684 clock-names = "phy", "ref", "phy_utmi", "phy_pipe",
1686 #phy-cells = <1>;
1687 samsung,pmu-syscon = <&pmu_system_controller>;
1692 compatible = "samsung,exynos5433-dwusb3";
1697 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1698 #address-cells = <1>;
1699 #size-cells = <1>;
1708 clock-names = "ref", "bus_early", "suspend";
1712 phy-names = "usb2-phy", "usb3-phy";
1717 compatible = "samsung,exynos7-dw-mshc-smu";
1719 #address-cells = <1>;
1720 #size-cells = <0>;
1724 clock-names = "biu", "ciu";
1725 fifo-depth = <0x40>;
1730 compatible = "samsung,exynos7-dw-mshc-smu";
1732 #address-cells = <1>;
1733 #size-cells = <0>;
1737 clock-names = "biu", "ciu";
1738 fifo-depth = <0x40>;
1743 compatible = "samsung,exynos7-dw-mshc-smu";
1745 #address-cells = <1>;
1746 #size-cells = <0>;
1750 clock-names = "biu", "ciu";
1751 fifo-depth = <0x40>;
1760 clock-names = "apb_pclk";
1761 #dma-cells = <1>;
1762 #dma-channels = <8>;
1763 #dma-requests = <32>;
1771 clock-names = "apb_pclk";
1772 #dma-cells = <1>;
1773 #dma-channels = <8>;
1774 #dma-requests = <32>;
1777 audio-subsystem@11400000 {
1778 compatible = "samsung,exynos5433-lpass";
1781 clock-names = "sfr0_ctrl";
1782 samsung,pmu-syscon = <&pmu_system_controller>;
1783 power-domains = <&pd_aud>;
1784 #address-cells = <1>;
1785 #size-cells = <1>;
1793 clock-names = "apb_pclk";
1794 #dma-cells = <1>;
1795 #dma-channels = <8>;
1796 #dma-requests = <32>;
1797 power-domains = <&pd_aud>;
1801 compatible = "samsung,exynos7-i2s";
1804 dma-names = "tx", "rx";
1806 #address-cells = <1>;
1807 #size-cells = <0>;
1811 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
1812 #clock-cells = <1>;
1813 pinctrl-names = "default";
1814 pinctrl-0 = <&i2s0_bus>;
1815 power-domains = <&pd_aud>;
1816 #sound-dai-cells = <1>;
1821 compatible = "samsung,exynos5433-uart";
1826 clock-names = "uart", "clk_uart_baud0";
1827 pinctrl-names = "default";
1828 pinctrl-0 = <&uart_aud_bus>;
1829 power-domains = <&pd_aud>;
1836 compatible = "arm,armv8-timer";
1848 #include "exynos5433-bus.dtsi"
1849 #include "exynos5433-pinctrl.dtsi"
1850 #include "exynos5433-tmu.dtsi"