Lines Matching +full:0 +full:x1294
48 #clock-cells = <0>;
53 #size-cells = <0>;
59 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
91 reg = <0x103>;
97 cpu4: cpu@0 {
101 reg = <0x0>;
113 reg = <0x1>;
123 reg = <0x2>;
133 reg = <0x3>;
255 cpu_off = <0x84000002>;
256 cpu_on = <0xC4000003>;
259 soc: soc@0 {
263 ranges = <0x0 0x0 0x0 0x18000000>;
267 reg = <0x10000000 0x100>;
272 reg = <0x10030000 0x1000>;
287 reg = <0x10fc0000 0x1000>;
296 reg = <0x105b0000 0x2000>;
307 reg = <0x14c80000 0x1000>;
313 reg = <0x10040000 0x1000>;
319 reg = <0x156e0000 0x1000>;
346 reg = <0x12460000 0x1000>;
360 reg = <0x13b90000 0x1000>;
386 reg = <0x114c0000 0x1000>;
395 reg = <0x13600000 0x1000>;
404 reg = <0x14800000 0x1000>;
413 reg = <0x13400000 0x1000>;
422 reg = <0x14aa0000 0x2000>;
432 reg = <0x13cf0000 0x1000>;
446 reg = <0x11900000 0x2000>;
455 reg = <0x11800000 0x2000>;
464 reg = <0x150d0000 0x1000>;
478 reg = <0x15280000 0x1000>;
488 reg = <0x14f80000 0x1000>;
498 reg = <0x146d0000 0x1000>;
512 reg = <0x120d0000 0x1000>;
528 reg = <0x145d0000 0x1000>;
550 reg = <0x11060000 0x1000>;
565 reg = <0x11140000 0x1000>;
574 reg = <0x105c4000 0x20>;
575 #power-domain-cells = <0>;
581 reg = <0x105c4020 0x20>;
582 #power-domain-cells = <0>;
589 reg = <0x105c4040 0x20>;
590 #power-domain-cells = <0>;
596 reg = <0x105c4060 0x20>;
597 #power-domain-cells = <0>;
603 reg = <0x105c4080 0x20>;
604 #power-domain-cells = <0>;
610 reg = <0x105c40a0 0x20>;
611 #power-domain-cells = <0>;
617 reg = <0x105c40c0 0x20>;
618 #power-domain-cells = <0>;
624 reg = <0x105c4120 0x20>;
625 #power-domain-cells = <0>;
631 reg = <0x105c4140 0x20>;
632 #power-domain-cells = <0>;
639 reg = <0x105c4180 0x20>;
640 #power-domain-cells = <0>;
646 reg = <0x105c41c0 0x20>;
647 #power-domain-cells = <0>;
653 reg = <0x10060000 0x200>;
658 #thermal-sensor-cells = <0>;
664 reg = <0x10068000 0x200>;
669 #thermal-sensor-cells = <0>;
675 reg = <0x10070000 0x200>;
680 #thermal-sensor-cells = <0>;
686 reg = <0x10078000 0x200>;
691 #thermal-sensor-cells = <0>;
697 reg = <0x1007c000 0x200>;
702 #thermal-sensor-cells = <0>;
708 reg = <0x101c0000 0x800>;
727 reg = <0x10480000 0x2000>;
733 reg = <0x10490000 0x2000>;
739 reg = <0x104b0000 0x2000>;
745 reg = <0x104c0000 0x2000>;
751 reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
761 reg = <0x114b0000 0x1000>;
768 reg = <0x10fe0000 0x1000>;
774 reg = <0x14ca0000 0x1000>;
780 reg = <0x14cb0000 0x1000>;
786 reg = <0x15690000 0x1000>;
792 reg = <0x11090000 0x1000>;
798 reg = <0x14cd0000 0x1000>;
804 reg = <0x14cc0000 0x1100>;
810 reg = <0x14ce0000 0x1100>;
816 reg = <0x105c0000 0x5008>;
824 offset = <0x400>; /* SWRESET */
825 mask = <0x1>;
833 reg = <0x11001000 0x1000>,
834 <0x11002000 0x2000>,
835 <0x11004000 0x2000>,
836 <0x11006000 0x2000>;
837 interrupts = <GIC_PPI 9 0xf04>;
851 reg = <0x13800000 0x2104>;
880 #size-cells = <0>;
882 port@0 {
883 reg = <0>;
894 reg = <0x13880000 0x20b8>;
924 reg = <0x13900000 0xC0>;
941 #size-cells = <0>;
945 #size-cells = <0>;
947 port@0 {
948 reg = <0>;
958 reg = <0x13930000 0x48>;
968 #size-cells = <0>;
970 port@0 {
971 reg = <0>;
989 reg = <0x13970000 0x70000>;
1009 #sound-dai-cells = <0>;
1014 reg = <0x13af0000 0x80>;
1019 reg = <0x13b80000 0x1010>;
1024 reg = <0x120f0000 0x1020>;
1029 reg = <0x145f0000 0x1038>;
1034 reg = <0x13c00000 0x1000>;
1049 reg = <0x13c10000 0x1000>;
1064 reg = <0x13c20000 0x1000>;
1079 reg = <0x14ac0000 0x5000>;
1130 reg = <0x15000000 0x1294>;
1131 interrupts = <0 402 IRQ_TYPE_LEVEL_HIGH>;
1142 reg = <0x15010000 0x1294>;
1143 interrupts = <0 403 IRQ_TYPE_LEVEL_HIGH>;
1154 reg = <0x15020000 0x10000>;
1167 reg = <0x152E0000 0x10000>;
1180 reg = <0x13a00000 0x1000>;
1186 #iommu-cells = <0>;
1191 reg = <0x13a10000 0x1000>;
1196 #iommu-cells = <0>;
1202 reg = <0x13a20000 0x1000>;
1207 #iommu-cells = <0>;
1213 reg = <0x13a30000 0x1000>;
1218 #iommu-cells = <0>;
1224 reg = <0x13C80000 0x1000>;
1229 #iommu-cells = <0>;
1235 reg = <0x13C90000 0x1000>;
1240 #iommu-cells = <0>;
1246 reg = <0x13CA0000 0x1000>;
1251 #iommu-cells = <0>;
1257 reg = <0x15040000 0x1000>;
1262 #iommu-cells = <0>;
1268 reg = <0x15050000 0x1000>;
1273 #iommu-cells = <0>;
1279 reg = <0x15060000 0x1000>;
1284 #iommu-cells = <0>;
1290 reg = <0x15200000 0x1000>;
1295 #iommu-cells = <0>;
1301 reg = <0x15210000 0x1000>;
1306 #iommu-cells = <0>;
1312 reg = <0x14c10000 0x100>;
1318 pinctrl-0 = <&uart0_bus>;
1324 reg = <0x14c20000 0x100>;
1330 pinctrl-0 = <&uart1_bus>;
1336 reg = <0x14c30000 0x100>;
1342 pinctrl-0 = <&uart2_bus>;
1348 reg = <0x14d20000 0x100>;
1353 #size-cells = <0>;
1358 samsung,spi-src-clk = <0>;
1360 pinctrl-0 = <&spi0_bus>;
1367 reg = <0x14d30000 0x100>;
1372 #size-cells = <0>;
1377 samsung,spi-src-clk = <0>;
1379 pinctrl-0 = <&spi1_bus>;
1386 reg = <0x14d40000 0x100>;
1391 #size-cells = <0>;
1396 samsung,spi-src-clk = <0>;
1398 pinctrl-0 = <&spi2_bus>;
1405 reg = <0x14d50000 0x100>;
1410 #size-cells = <0>;
1415 samsung,spi-src-clk = <0>;
1417 pinctrl-0 = <&spi3_bus>;
1424 reg = <0x14d00000 0x100>;
1429 #size-cells = <0>;
1434 samsung,spi-src-clk = <0>;
1436 pinctrl-0 = <&spi4_bus>;
1443 reg = <0x14d10000 0x100>;
1454 reg = <0x14d60000 0x100>;
1469 reg = <0x14dd0000 0x100>;
1475 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
1484 reg = <0x14e40000 0x1000>;
1487 #size-cells = <0>;
1489 pinctrl-0 = <&hs_i2c0_bus>;
1497 reg = <0x14e50000 0x1000>;
1500 #size-cells = <0>;
1502 pinctrl-0 = <&hs_i2c1_bus>;
1510 reg = <0x14e60000 0x1000>;
1513 #size-cells = <0>;
1515 pinctrl-0 = <&hs_i2c2_bus>;
1523 reg = <0x14e70000 0x1000>;
1526 #size-cells = <0>;
1528 pinctrl-0 = <&hs_i2c3_bus>;
1536 reg = <0x14ec0000 0x1000>;
1539 #size-cells = <0>;
1541 pinctrl-0 = <&hs_i2c4_bus>;
1549 reg = <0x14ed0000 0x1000>;
1552 #size-cells = <0>;
1554 pinctrl-0 = <&hs_i2c5_bus>;
1562 reg = <0x14ee0000 0x1000>;
1565 #size-cells = <0>;
1567 pinctrl-0 = <&hs_i2c6_bus>;
1575 reg = <0x14ef0000 0x1000>;
1578 #size-cells = <0>;
1580 pinctrl-0 = <&hs_i2c7_bus>;
1588 reg = <0x14d90000 0x1000>;
1591 #size-cells = <0>;
1593 pinctrl-0 = <&hs_i2c8_bus>;
1601 reg = <0x14da0000 0x1000>;
1604 #size-cells = <0>;
1606 pinctrl-0 = <&hs_i2c9_bus>;
1614 reg = <0x14de0000 0x1000>;
1617 #size-cells = <0>;
1619 pinctrl-0 = <&hs_i2c10_bus>;
1627 reg = <0x14df0000 0x1000>;
1630 #size-cells = <0>;
1632 pinctrl-0 = <&hs_i2c11_bus>;
1656 reg = <0x15400000 0x10000>;
1658 phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>;
1665 reg = <0x15500000 0x100>;
1679 reg = <0x15580000 0x100>;
1709 reg = <0x15a00000 0x10000>;
1711 phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>;
1720 #size-cells = <0>;
1721 reg = <0x15540000 0x2000>;
1725 fifo-depth = <0x40>;
1733 #size-cells = <0>;
1734 reg = <0x15550000 0x2000>;
1738 fifo-depth = <0x40>;
1746 #size-cells = <0>;
1747 reg = <0x15560000 0x2000>;
1751 fifo-depth = <0x40>;
1757 reg = <0x15610000 0x1000>;
1768 reg = <0x15600000 0x1000>;
1779 reg = <0x11400000 0x100>, <0x11500000 0x08>;
1790 reg = <0x11420000 0x1000>;
1802 reg = <0x11440000 0x100>;
1803 dmas = <&adma 0>, <&adma 2>;
1807 #size-cells = <0>;
1814 pinctrl-0 = <&i2s0_bus>;
1822 reg = <0x11460000 0x100>;
1828 pinctrl-0 = <&uart_aud_bus>;