Lines Matching +full:gic +full:- +full:v3
4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
55 compatible = "arm,cortex-a72";
57 enable-method = "psci";
58 next-level-cache = <&CLUSTER0_L2>;
63 compatible = "arm,cortex-a72";
65 enable-method = "psci";
66 next-level-cache = <&CLUSTER1_L2>;
71 compatible = "arm,cortex-a72";
73 enable-method = "psci";
74 next-level-cache = <&CLUSTER1_L2>;
79 compatible = "arm,cortex-a72";
81 enable-method = "psci";
82 next-level-cache = <&CLUSTER2_L2>;
87 compatible = "arm,cortex-a72";
89 enable-method = "psci";
90 next-level-cache = <&CLUSTER2_L2>;
95 compatible = "arm,cortex-a72";
97 enable-method = "psci";
98 next-level-cache = <&CLUSTER3_L2>;
103 compatible = "arm,cortex-a72";
105 enable-method = "psci";
106 next-level-cache = <&CLUSTER3_L2>;
109 CLUSTER0_L2: l2-cache@0 {
113 CLUSTER1_L2: l2-cache@100 {
117 CLUSTER2_L2: l2-cache@200 {
121 CLUSTER3_L2: l2-cache@300 {
132 compatible = "arm,psci-0.2";
137 compatible = "arm,armv8-pmuv3";
142 compatible = "arm,armv8-timer";
150 compatible = "brcm,sr-mhb", "syscon";
155 compatible = "simple-bus";
156 #address-cells = <1>;
157 #size-cells = <1>;
161 compatible = "arm,ccn-502";
166 gic: interrupt-controller@2c00000 { label
167 compatible = "arm,gic-v3";
168 #interrupt-cells = <3>;
169 #address-cells = <1>;
170 #size-cells = <1>;
172 interrupt-controller;
177 gic_its: gic-its@63c20000 {
178 compatible = "arm,gic-v3-its";
179 msi-controller;
180 #msi-cells = <1>;
186 compatible = "arm,mmu-500";
188 #global-interrupts = <1>;
254 #iommu-cells = <2>;
259 compatible = "simple-bus";
260 #address-cells = <1>;
261 #size-cells = <1>;
264 #include "stingray-clock.dtsi"
267 compatible = "brcm,ocotp-v2";
269 brcm,ocotp-size = <2048>;
274 compatible = "brcm,sr-cdru", "syscon";
279 compatible = "brcm,iproc-gpio";
282 #gpio-cells = <2>;
283 gpio-controller;
287 #include "stingray-fs4.dtsi"
288 #include "stingray-sata.dtsi"
289 #include "stingray-pcie.dtsi"
290 #include "stingray-usb.dtsi"
293 compatible = "simple-bus";
294 #address-cells = <1>;
295 #size-cells = <1>;
298 #include "stingray-pinctrl.dtsi"
300 mdio_mux_iproc: mdio-mux@20000 {
301 compatible = "brcm,mdio-mux-iproc";
303 #address-cells = <1>;
304 #size-cells = <0>;
308 #address-cells = <1>;
309 #size-cells = <0>;
314 #address-cells = <1>;
315 #size-cells = <0>;
320 #address-cells = <1>;
321 #size-cells = <0>;
326 #address-cells = <1>;
327 #size-cells = <0>;
332 compatible = "brcm,iproc-pwm";
335 #pwm-cells = <3>;
346 clock-names = "timer1", "timer2", "apb_pclk";
357 clock-names = "timer1", "timer2", "apb_pclk";
367 clock-names = "timer1", "timer2", "apb_pclk";
378 clock-names = "timer1", "timer2", "apb_pclk";
389 clock-names = "timer1", "timer2", "apb_pclk";
400 clock-names = "timer1", "timer2", "apb_pclk";
411 clock-names = "timer1", "timer2", "apb_pclk";
422 clock-names = "timer1", "timer2", "apb_pclk";
427 compatible = "brcm,iproc-i2c";
429 #address-cells = <1>;
430 #size-cells = <0>;
432 clock-frequency = <100000>;
441 clock-names = "wdog_clk", "apb_pclk";
442 timeout-sec = <60>;
446 compatible = "brcm,iproc-gpio";
449 #gpio-cells = <2>;
450 gpio-controller;
451 interrupt-controller;
453 gpio-ranges = <&pinmux 0 0 16>,
471 compatible = "brcm,iproc-i2c";
473 #address-cells = <1>;
474 #size-cells = <0>;
476 clock-frequency = <100000>;
482 compatible = "snps,dw-apb-uart";
484 reg-shift = <2>;
485 clock-frequency = <25000000>;
486 interrupt-parent = <&gic>;
493 compatible = "snps,dw-apb-uart";
495 reg-shift = <2>;
496 clock-frequency = <25000000>;
497 interrupt-parent = <&gic>;
504 compatible = "snps,dw-apb-uart";
506 reg-shift = <2>;
507 clock-frequency = <25000000>;
508 interrupt-parent = <&gic>;
515 compatible = "snps,dw-apb-uart";
517 reg-shift = <2>;
518 clock-frequency = <25000000>;
519 interrupt-parent = <&gic>;
529 clock-names = "spiclk", "apb_pclk";
530 num-cs = <1>;
531 #address-cells = <1>;
532 #size-cells = <0>;
541 clock-names = "spiclk", "apb_pclk";
542 num-cs = <1>;
543 #address-cells = <1>;
544 #size-cells = <0>;
549 compatible = "brcm,iproc-rng200";
565 #dma-cells = <1>;
566 #dma-channels = <8>;
567 #dma-requests = <32>;
569 clock-names = "apb_pclk";
576 reg-names = "amac_base";
577 dma-coherent;
583 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
587 reg-names = "nand", "iproc-idm", "iproc-ext";
589 #address-cells = <1>;
590 #size-cells = <0>;
591 brcm,nand-has-wp;
596 compatible = "brcm,sdhci-iproc";
599 bus-width = <8>;
606 compatible = "brcm,sdhci-iproc";
609 bus-width = <8>;
617 compatible = "simple-bus";
618 #address-cells = <1>;
619 #size-cells = <1>;
623 compatible = "brcm,sr-thermal";
625 brcm,tmon-mask = <0x3f>;
626 #thermal-sensor-cells = <1>;
630 thermal-zones {
631 ihost0_thermal: ihost0-thermal {
632 polling-delay-passive = <0>;
633 polling-delay = <1000>;
634 thermal-sensors = <&tmon 0>;
636 cpu-crit {
643 ihost1_thermal: ihost1-thermal {
644 polling-delay-passive = <0>;
645 polling-delay = <1000>;
646 thermal-sensors = <&tmon 1>;
648 cpu-crit {
655 ihost2_thermal: ihost2-thermal {
656 polling-delay-passive = <0>;
657 polling-delay = <1000>;
658 thermal-sensors = <&tmon 2>;
660 cpu-crit {
667 ihost3_thermal: ihost3-thermal {
668 polling-delay-passive = <0>;
669 polling-delay = <1000>;
670 thermal-sensors = <&tmon 3>;
672 cpu-crit {
679 crmu_thermal: crmu-thermal {
680 polling-delay-passive = <0>;
681 polling-delay = <1000>;
682 thermal-sensors = <&tmon 4>;
684 cpu-crit {
691 nitro_thermal: nitro-thermal {
692 polling-delay-passive = <0>;
693 polling-delay = <1000>;
694 thermal-sensors = <&tmon 5>;
696 cpu-crit {
705 nic-hsls {
706 compatible = "simple-bus";
707 #address-cells = <1>;
708 #size-cells = <1>;
712 compatible = "brcm,iproc-nic-i2c";
713 #address-cells = <1>;
714 #size-cells = <0>;
717 brcm,ape-hsls-addr-mask = <0x03400000>;
718 clock-frequency = <100000>;