Lines Matching +full:xpressrich3 +full:- +full:axi
1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
30 interrupt-names = "mhu_lpri_rx",
32 #mbox-cells = <1>;
34 clock-names = "apb_pclk";
38 compatible = "arm,mmu-400", "arm,smmu-v1";
42 #iommu-cells = <1>;
43 #global-interrupts = <1>;
44 power-domains = <&scpi_devpd 1>;
45 dma-coherent;
50 compatible = "arm,mmu-401", "arm,smmu-v1";
54 #iommu-cells = <1>;
55 #global-interrupts = <1>;
56 dma-coherent;
61 compatible = "arm,mmu-401", "arm,smmu-v1";
65 #iommu-cells = <1>;
66 #global-interrupts = <1>;
67 dma-coherent;
68 power-domains = <&scpi_devpd 0>;
71 gic: interrupt-controller@2c010000 {
72 compatible = "arm,gic-400", "arm,cortex-a15-gic";
77 #address-cells = <1>;
78 #interrupt-cells = <3>;
79 #size-cells = <1>;
80 interrupt-controller;
85 compatible = "arm,gic-v2m-frame";
86 msi-controller;
91 compatible = "arm,gic-v2m-frame";
92 msi-controller;
97 compatible = "arm,gic-v2m-frame";
98 msi-controller;
103 compatible = "arm,gic-v2m-frame";
104 msi-controller;
110 compatible = "arm,armv8-timer";
123 compatible = "arm,coresight-tmc", "arm,primecell";
127 clock-names = "apb_pclk";
128 power-domains = <&scpi_devpd 0>;
130 in-ports {
133 remote-endpoint = <&main_funnel_out_port>;
138 out-ports {
147 compatible = "arm,coresight-tpiu", "arm,primecell";
151 clock-names = "apb_pclk";
152 power-domains = <&scpi_devpd 0>;
153 in-ports {
156 remote-endpoint = <&replicator_out_port0>;
164 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
168 clock-names = "apb_pclk";
169 power-domains = <&scpi_devpd 0>;
171 out-ports {
174 remote-endpoint = <&etf0_in_port>;
179 main_funnel_in_ports: in-ports {
180 #address-cells = <1>;
181 #size-cells = <0>;
186 remote-endpoint = <&cluster0_funnel_out_port>;
193 remote-endpoint = <&cluster1_funnel_out_port>;
200 compatible = "arm,coresight-tmc", "arm,primecell";
205 clock-names = "apb_pclk";
206 power-domains = <&scpi_devpd 0>;
207 arm,scatter-gather;
208 in-ports {
211 remote-endpoint = <&replicator_out_port1>;
218 compatible = "arm,coresight-stm", "arm,primecell";
221 reg-names = "stm-base", "stm-stimulus-base";
224 clock-names = "apb_pclk";
225 power-domains = <&scpi_devpd 0>;
226 out-ports {
235 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
239 clock-names = "apb_pclk";
240 power-domains = <&scpi_devpd 0>;
242 out-ports {
243 #address-cells = <1>;
244 #size-cells = <0>;
250 remote-endpoint = <&tpiu_in_port>;
257 remote-endpoint = <&etr_in_port>;
261 in-ports {
269 cpu_debug0: cpu-debug@22010000 {
270 compatible = "arm,coresight-cpu-debug", "arm,primecell";
274 clock-names = "apb_pclk";
275 power-domains = <&scpi_devpd 0>;
279 compatible = "arm,coresight-etm4x", "arm,primecell";
283 clock-names = "apb_pclk";
284 power-domains = <&scpi_devpd 0>;
285 out-ports {
288 remote-endpoint = <&cluster0_funnel_in_port0>;
295 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
299 clock-names = "apb_pclk";
300 power-domains = <&scpi_devpd 0>;
301 out-ports {
304 remote-endpoint = <&main_funnel_in_port0>;
309 in-ports {
310 #address-cells = <1>;
311 #size-cells = <0>;
316 remote-endpoint = <&cluster0_etm0_out_port>;
323 remote-endpoint = <&cluster0_etm1_out_port>;
329 cpu_debug1: cpu-debug@22110000 {
330 compatible = "arm,coresight-cpu-debug", "arm,primecell";
334 clock-names = "apb_pclk";
335 power-domains = <&scpi_devpd 0>;
339 compatible = "arm,coresight-etm4x", "arm,primecell";
343 clock-names = "apb_pclk";
344 power-domains = <&scpi_devpd 0>;
345 out-ports {
348 remote-endpoint = <&cluster0_funnel_in_port1>;
354 cpu_debug2: cpu-debug@23010000 {
355 compatible = "arm,coresight-cpu-debug", "arm,primecell";
359 clock-names = "apb_pclk";
360 power-domains = <&scpi_devpd 0>;
364 compatible = "arm,coresight-etm4x", "arm,primecell";
368 clock-names = "apb_pclk";
369 power-domains = <&scpi_devpd 0>;
370 out-ports {
373 remote-endpoint = <&cluster1_funnel_in_port0>;
380 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
384 clock-names = "apb_pclk";
385 power-domains = <&scpi_devpd 0>;
386 out-ports {
389 remote-endpoint = <&main_funnel_in_port1>;
394 in-ports {
395 #address-cells = <1>;
396 #size-cells = <0>;
401 remote-endpoint = <&cluster1_etm0_out_port>;
408 remote-endpoint = <&cluster1_etm1_out_port>;
414 remote-endpoint = <&cluster1_etm2_out_port>;
420 remote-endpoint = <&cluster1_etm3_out_port>;
426 cpu_debug3: cpu-debug@23110000 {
427 compatible = "arm,coresight-cpu-debug", "arm,primecell";
431 clock-names = "apb_pclk";
432 power-domains = <&scpi_devpd 0>;
436 compatible = "arm,coresight-etm4x", "arm,primecell";
440 clock-names = "apb_pclk";
441 power-domains = <&scpi_devpd 0>;
442 out-ports {
445 remote-endpoint = <&cluster1_funnel_in_port1>;
451 cpu_debug4: cpu-debug@23210000 {
452 compatible = "arm,coresight-cpu-debug", "arm,primecell";
456 clock-names = "apb_pclk";
457 power-domains = <&scpi_devpd 0>;
461 compatible = "arm,coresight-etm4x", "arm,primecell";
465 clock-names = "apb_pclk";
466 power-domains = <&scpi_devpd 0>;
467 out-ports {
470 remote-endpoint = <&cluster1_funnel_in_port2>;
476 cpu_debug5: cpu-debug@23310000 {
477 compatible = "arm,coresight-cpu-debug", "arm,primecell";
481 clock-names = "apb_pclk";
482 power-domains = <&scpi_devpd 0>;
486 compatible = "arm,coresight-etm4x", "arm,primecell";
490 clock-names = "apb_pclk";
491 power-domains = <&scpi_devpd 0>;
492 out-ports {
495 remote-endpoint = <&cluster1_funnel_in_port3>;
502 compatible = "arm,juno-mali", "arm,mali-t624";
507 interrupt-names = "job", "mmu", "gpu";
509 power-domains = <&scpi_devpd 1>;
510 dma-coherent;
511 /* The SMMU is only really of interest to bare-metal hypervisors */
517 compatible = "arm,juno-sram-ns", "mmio-sram";
520 #address-cells = <1>;
521 #size-cells = <1>;
524 cpu_scp_lpri: scp-sram@0 {
525 compatible = "arm,juno-scp-shmem";
529 cpu_scp_hpri: scp-sram@200 {
530 compatible = "arm,juno-scp-shmem";
536 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
539 bus-range = <0 255>;
540 linux,pci-domain = <0>;
541 #address-cells = <3>;
542 #size-cells = <2>;
543 dma-coherent;
547 #interrupt-cells = <1>;
548 interrupt-map-mask = <0 0 0 7>;
549 interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
553 msi-parent = <&v2m_0>;
555 iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
556 iommu-map = <0x0 &smmu_pcie 0x0 0x1>;
565 compatible = "arm,scpi-clocks";
567 scpi_dvfs: scpi-dvfs {
568 compatible = "arm,scpi-dvfs-clocks";
569 #clock-cells = <1>;
570 clock-indices = <0>, <1>, <2>;
571 clock-output-names = "atlclk", "aplclk","gpuclk";
573 scpi_clk: scpi-clk {
574 compatible = "arm,scpi-variable-clocks";
575 #clock-cells = <1>;
576 clock-indices = <3>;
577 clock-output-names = "pxlclk";
581 scpi_devpd: scpi-power-domains {
582 compatible = "arm,scpi-power-domains";
583 num-domains = <2>;
584 #power-domain-cells = <1>;
588 compatible = "arm,scpi-sensors";
589 #thermal-sensor-cells = <1>;
593 thermal-zones {
595 polling-delay = <1000>;
596 polling-delay-passive = <100>;
597 thermal-sensors = <&scpi_sensors0 0>;
601 polling-delay = <1000>;
602 polling-delay-passive = <100>;
603 thermal-sensors = <&scpi_sensors0 3>;
606 big_cluster_thermal_zone: big-cluster {
607 polling-delay = <1000>;
608 polling-delay-passive = <100>;
609 thermal-sensors = <&scpi_sensors0 21>;
613 little_cluster_thermal_zone: little-cluster {
614 polling-delay = <1000>;
615 polling-delay-passive = <100>;
616 thermal-sensors = <&scpi_sensors0 22>;
621 polling-delay = <1000>;
622 polling-delay-passive = <100>;
623 thermal-sensors = <&scpi_sensors0 23>;
628 polling-delay = <1000>;
629 polling-delay-passive = <100>;
630 thermal-sensors = <&scpi_sensors0 24>;
636 compatible = "arm,mmu-401", "arm,smmu-v1";
640 #iommu-cells = <1>;
641 #global-interrupts = <1>;
642 dma-coherent;
647 compatible = "arm,mmu-401", "arm,smmu-v1";
651 #iommu-cells = <1>;
652 #global-interrupts = <1>;
656 compatible = "arm,mmu-401", "arm,smmu-v1";
660 #iommu-cells = <1>;
661 #global-interrupts = <1>;
665 compatible = "arm,mmu-401", "arm,smmu-v1";
669 #iommu-cells = <1>;
670 #global-interrupts = <1>;
671 dma-coherent;
677 #dma-cells = <1>;
678 #dma-channels = <8>;
679 #dma-requests = <32>;
699 clock-names = "apb_pclk";
708 clock-names = "pxlclk";
712 remote-endpoint = <&tda998x_1_input>;
723 clock-names = "pxlclk";
727 remote-endpoint = <&tda998x_0_input>;
737 clock-names = "uartclk", "apb_pclk";
741 compatible = "snps,designware-i2c";
743 #address-cells = <1>;
744 #size-cells = <0>;
746 clock-frequency = <400000>;
747 i2c-sda-hold-time-ns = <500>;
750 hdmi-transmitter@70 {
755 remote-endpoint = <&hdlcd0_output>;
760 hdmi-transmitter@71 {
765 remote-endpoint = <&hdlcd1_output>;
772 compatible = "generic-ohci";
780 compatible = "generic-ehci";
787 memory-controller@7ffd0000 {
793 clock-names = "apb_pclk";
804 compatible = "simple-bus";
805 #address-cells = <2>;
806 #size-cells = <1>;
814 #interrupt-cells = <1>;
815 interrupt-map-mask = <0 0 15>;
816 interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
831 site2: tlx-bus@60000000 {
832 compatible = "simple-bus";
833 #address-cells = <1>;
834 #size-cells = <1>;
836 #interrupt-cells = <1>;
837 interrupt-map-mask = <0 0>;
838 interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;