Lines Matching +full:usb3 +full:- +full:phy0
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1.dtsi"
10 #include "meson-khadas-vim3.dtsi"
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
17 vddcpu: regulator-vddcpu {
21 compatible = "pwm-regulator";
23 regulator-name = "VDDCPU";
24 regulator-min-microvolt = <690000>;
25 regulator-max-microvolt = <1050000>;
27 vin-supply = <&vsys_3v3>;
30 pwm-dutycycle-range = <100 0>;
32 regulator-boot-on;
33 regulator-always-on;
38 cpu-supply = <&vddcpu>;
39 operating-points-v2 = <&cpu_opp_table>;
41 clock-latency = <50000>;
45 cpu-supply = <&vddcpu>;
46 operating-points-v2 = <&cpu_opp_table>;
48 clock-latency = <50000>;
52 cpu-supply = <&vddcpu>;
53 operating-points-v2 = <&cpu_opp_table>;
55 clock-latency = <50000>;
59 cpu-supply = <&vddcpu>;
60 operating-points-v2 = <&cpu_opp_table>;
62 clock-latency = <50000>;
66 pinctrl-0 = <&pwm_ao_d_e_pins>;
67 pinctrl-names = "default";
69 clock-names = "clkin1";
74 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
76 * an USB3.0 Type A connector and a M.2 Key M slot.
78 * the USB3.0 controller and the PCIe Controller, thus only
80 * If the MCU is configured to mux the PCIe/USB3.0 differential lines
82 * USB3.0 from the USB Complex and enable the PCIe controller.
93 sd-uhs-sdr50;
98 phy-names = "usb2-phy0", "usb2-phy1";