Lines Matching +full:meson +full:- +full:gx +full:- +full:uart
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/meson-a1-gpio.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <2>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a35";
25 enable-method = "psci";
26 next-level-cache = <&l2>;
31 compatible = "arm,cortex-a35";
33 enable-method = "psci";
34 next-level-cache = <&l2>;
37 l2: l2-cache0 {
43 compatible = "arm,psci-1.0";
47 reserved-memory {
48 #address-cells = <2>;
49 #size-cells = <2>;
53 compatible = "shared-dma-pool";
57 linux,cma-default;
61 sm: secure-monitor {
62 compatible = "amlogic,meson-gxbb-sm";
64 pwrc: power-controller {
65 compatible = "amlogic,meson-a1-pwrc";
66 #power-domain-cells = <1>;
72 compatible = "simple-bus";
73 #address-cells = <2>;
74 #size-cells = <2>;
78 compatible = "simple-bus";
80 #address-cells = <2>;
81 #size-cells = <2>;
85 reset: reset-controller@0 {
86 compatible = "amlogic,meson-a1-reset";
88 #reset-cells = <1>;
92 compatible = "amlogic,meson-a1-periphs-pinctrl";
93 #address-cells = <2>;
94 #size-cells = <2>;
100 reg-names = "mux", "gpio";
101 gpio-controller;
102 #gpio-cells = <2>;
103 gpio-ranges = <&periphs_pinctrl 0 0 62>;
109 compatible = "amlogic,meson-gx-uart",
110 "amlogic,meson-ao-uart";
114 clock-names = "xtal", "pclk", "baud";
119 compatible = "amlogic,meson-gx-uart",
120 "amlogic,meson-ao-uart";
124 clock-names = "xtal", "pclk", "baud";
129 gic: interrupt-controller@ff901000 {
130 compatible = "arm,gic-400";
135 interrupt-controller;
138 #interrupt-cells = <3>;
139 #address-cells = <0>;
144 compatible = "arm,armv8-timer";
155 xtal: xtal-clk {
156 compatible = "fixed-clock";
157 clock-frequency = <24000000>;
158 clock-output-names = "xtal";
159 #clock-cells = <0>;