Lines Matching +full:0 +full:x80000
10 #clock-cells = <0>;
17 #clock-cells = <0>;
24 #clock-cells = <0>;
31 #clock-cells = <0>;
38 reg = <0 0xe0700000 0 0x80000>,
39 <0 0xe0780000 0 0x80000>,
40 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */
41 <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */
42 <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */
43 interrupts = <0 325 4>,
44 <0 346 1>, <0 347 1>, <0 348 1>, <0 349 1>,
45 <0 323 4>;
47 amd,speed-set = <0>;
48 amd,serdes-blwc = <1>, <1>, <0>;
51 amd,serdes-tx-amp = <0>, <0>, <0>;
53 amd,serdes-dfe-tap-enable = <0>, <0>, <7>;
64 reg = <0 0xe0900000 0 0x80000>,
65 <0 0xe0980000 0 0x80000>,
66 <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */
67 <0 0xe1250080 0 0x00060>, /* SERDES IR 1/2 */
68 <0 0xe12500fc 0 0x00004>; /* SERDES IR 2/2 */
69 interrupts = <0 324 4>,
70 <0 341 1>, <0 342 1>, <0 343 1>, <0 344 1>,
71 <0 322 4>;
73 amd,speed-set = <0>;
74 amd,serdes-blwc = <1>, <1>, <0>;
77 amd,serdes-tx-amp = <0>, <0>, <0>;
79 amd,serdes-dfe-tap-enable = <0>, <0>, <7>;
90 reg = <0 0xe0600000 0 0x10000>;
95 <0 336 4>,
96 <0 336 4>;
99 0 1 2 3 4 5 6 7
106 reg = <0 0xe0800000 0 0x10000>;
111 <0 335 4>,
112 <0 335 4>;
115 0 1 2 3 4 5 6 7